公开(公告)号：JPH0387974A

公开(公告)日：1991-04-12

申请号：JP14171990

申请日：1990-06-01

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： MISHIEERU TARIERUCHIO ,  MARIO RABORUUNIA ,  RINARUDO PORUTSUTSUI ,  JIANGUIDO RIZOTSUTO

IPC: G06F17/14 ,  G06F17/16

Abstract: PURPOSE: To attain the high speed of calculation by calculating the product of data and a coefficient matrix, and calculating the afterward product of data and the substituted coefficient matrix. CONSTITUTION: Input data and coefficients are supplied through input buses 40 and 41 to registers 35 and 36. Then, two of three connected lines as a set extending from an RAM 34 supplies the coefficients of a substituted matrix through a shift register 38 to a multiplier 32, and supplies data to be transformed to a two-to-one multiplexer register 39. The multiplexer register 39 applies the data from the register 36 or the data from the RAM 34 to a first multiplier 31, and the third line is used for supplying a transformation coefficient from the RAM to the multiplier 31. Moreover, an accumulator 30 executes the accumulation of a second matrix product (first matrix product ×a substituted matrix coefficient), and applies the output of two complements. Thus, the high speed of calculation can be attained.