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公开(公告)号：BR9002615A
公开(公告)日：1991-08-20
申请号：BR9002615
申请日：1990-06-01
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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公开(公告)号：IT1235263B
公开(公告)日：1992-06-26
申请号：IT2074489
申请日：1989-06-02
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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公开(公告)号：DE69031293D1
公开(公告)日：1997-09-25
申请号：DE69031293
申请日：1990-05-29
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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公开(公告)号：IT8783684D0
公开(公告)日：1987-12-22
申请号：IT8368487
申请日：1987-12-22
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： DANIELE VINCENZO , MONTI MARCO MARIA , TALIERCIO MICHELE , CAPOCELLI PIERO
Abstract: An integrated analog circuit having a circuit topology and intrinsic characteristics which may be selected by digital control means is formed by batteries of similar circuit components arranged substantially in parallel or in a matrix array, anyone of which may be isolated or not by means of a dedicated integrated switch and by alternative interconnection paths among the different circuit components and/or batteries of circuit components, which may be also be selected by closing a relative integrated switch. A dedicated nonvolatile memory, integrated on the same chip may be permanently programmed and determine a certain configuration of all the integrated switches thus selecting a particular component or more components of each of said batteries of functionally similar components, and/or selecting a certain interconnection path among the different circuit components in order to form a functional integrated circuit having the desired topology and intrinsic characteristics. The integrated nonvolatile memory is programmed by means of a software program which may take as input data the desired values of the different parameters which determine the intrinsic characteristics of the functional analog circuit and the type of functional analog circuit itself.
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公开(公告)号：PL163731B1
公开(公告)日：1994-04-29
申请号：PL28543290
申请日：1990-06-01
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
IPC: G06F17/14 , G06F17/16 , G06F15/31 , G06F15/347
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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Patent Agency Ranking
公开(公告)号：IT1220190B
公开(公告)日：1990-06-06
申请号：IT8368487
申请日：1987-12-22
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： DANIELE VINCENZO , MONTI MARCO MARIA , TALIERCIO MICHELE , CAPOCELLI PIERO
Abstract: An integrated analog circuit having a circuit topology and intrinsic characteristics which may be selected by digital control means is formed by batteries of similar circuit components arranged substantially in parallel or in a matrix array, anyone of which may be isolated or not by means of a dedicated integrated switch and by alternative interconnection paths among the different circuit components and/or batteries of circuit components, which may be also be selected by closing a relative integrated switch. A dedicated nonvolatile memory, integrated on the same chip may be permanently programmed and determine a certain configuration of all the integrated switches thus selecting a particular component or more components of each of said batteries of functionally similar components, and/or selecting a certain interconnection path among the different circuit components in order to form a functional integrated circuit having the desired topology and intrinsic characteristics. The integrated nonvolatile memory is programmed by means of a software program which may take as input data the desired values of the different parameters which determine the intrinsic characteristics of the functional analog circuit and the type of functional analog circuit itself.
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公开(公告)号：DE69031293T2
公开(公告)日：1998-01-15
申请号：DE69031293
申请日：1990-05-29
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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公开(公告)号：DE3851423T2
公开(公告)日：1995-01-19
申请号：DE3851423
申请日：1988-12-21
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： DANIELE VINCENZO , MONTI MARCO MARIA , TALIERCIO MICHELE , CAPOCELLI PIERO
Abstract: An integrated analog circuit having a circuit topology and intrinsic characteristics which may be selected by digital control means is formed by batteries of similar circuit components arranged substantially in parallel or in a matrix array, anyone of which may be isolated or not by means of a dedicated integrated switch and by alternative interconnection paths among the different circuit components and/or batteries of circuit components, which may be also be selected by closing a relative integrated switch. A dedicated nonvolatile memory, integrated on the same chip may be permanently programmed and determine a certain configuration of all the integrated switches thus selecting a particular component or more components of each of said batteries of functionally similar components, and/or selecting a certain interconnection path among the different circuit components in order to form a functional integrated circuit having the desired topology and intrinsic characteristics. The integrated nonvolatile memory is programmed by means of a software program which may take as input data the desired values of the different parameters which determine the intrinsic characteristics of the functional analog circuit and the type of functional analog circuit itself.
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公开(公告)号：DE3851423D1
公开(公告)日：1994-10-13
申请号：DE3851423
申请日：1988-12-21
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： DANIELE VINCENZO , MONTI MARCO MARIA , TALIERCIO MICHELE , CAPOCELLI PIERO
Abstract: An integrated analog circuit having a circuit topology and intrinsic characteristics which may be selected by digital control means is formed by batteries of similar circuit components arranged substantially in parallel or in a matrix array, anyone of which may be isolated or not by means of a dedicated integrated switch and by alternative interconnection paths among the different circuit components and/or batteries of circuit components, which may be also be selected by closing a relative integrated switch. A dedicated nonvolatile memory, integrated on the same chip may be permanently programmed and determine a certain configuration of all the integrated switches thus selecting a particular component or more components of each of said batteries of functionally similar components, and/or selecting a certain interconnection path among the different circuit components in order to form a functional integrated circuit having the desired topology and intrinsic characteristics. The integrated nonvolatile memory is programmed by means of a software program which may take as input data the desired values of the different parameters which determine the intrinsic characteristics of the functional analog circuit and the type of functional analog circuit itself.
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公开(公告)号：IT8920744D0
公开(公告)日：1989-06-02
申请号：IT2074489
申请日：1989-06-02
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： TALIERCIO MICHELE , LAVORGNA MARIO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: The method comprises two time steps of multiplication and accumulation, of which a first step is assigned to the product of the data and of the coefficient matrices and a second step is assigned to the subsequent product by the transposed coefficient matrix. Moreover preferably the data to be transformed and the corresponding coefficients are supplied to a first multiplication step in time succession, possibly after their storage in an appropriate memory. The device for the attainment of said method comprises two multipliers (31, 32) with their corresponding accumulator (33, 30), a RAM-type memory (34) for storing the data to be transformed and the transform coefficients, a multiplexer (39) which receives said data first from the input and then from the memory (34) and arranges them in a time succession for the supply to a first multiplier (31), and a shift register (38) which receives said transform coefficients from the memory (34) and arranges them for the supply to the second multiplier (32).
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