Circuit for generating a reference voltage and detecting an undervoltage of a supply voltage and corresponding method
    1.
    发明公开
    Circuit for generating a reference voltage and detecting an undervoltage of a supply voltage and corresponding method 失效
    用于产生参考电压,并检测电源电压的下降和相关联的方法的电路装置

    公开(公告)号:EP0733959A1

    公开(公告)日:1996-09-25

    申请号:EP95830111.1

    申请日:1995-03-24

    CPC classification number: G11C5/147 G05F1/465 G05F3/267

    Abstract: A circuit for generating a reference voltage and detecting a drop in a supply voltage, comprising at least one threshold comparator (12) having an input terminal (IN) and an output terminal, and a voltage divider (14) connected between a first supply voltage reference (Vs) and a second voltage reference (GND) and connected to the input terminal (IN) of the comparator (12), further provides for the output terminal (OUT) of said comparator (12) to be connected to the input terminal (IN) through at least one feedback network comprising at least one current generator (CG1).
    The feedback network further comprises a buffer block (13) having an input terminal connected to said comparator (12) and a first output terminal (DO) connected to a switch (SW) which is connected between a circuit node (X2) of said voltage divider (14) and the second voltage reference (GND).

    Abstract translation: 连接在第一电源电压之间,用于产生参考电压,并检测在供电电压下降的电路,包括:具有输入端(IN)上,并输出终端的至少一个阈值比较器(12),和一个电压分压器(14) 参考(VS)和一个第二电压基准(GND)和连接到所述比较器(12)的输入端(IN),还提供了用于所述比较器(12)的输出端(OUT)被连接到输入端 (IN)通过至少一个反馈网络,其包括至少一个电流发生器(CG1)。 反馈网络还包括具有连接到连接到被连接在所述电压的电路节点(X2)之间的开关(SW)所有的所述比较器(12)和第一输出端(DO)输入端一个缓冲器块(13) 除法器(14)和所述第二电压基准(GND)。

    Driving circuit for a field effect transistor in final semibridge stage
    2.
    发明公开
    Driving circuit for a field effect transistor in final semibridge stage 失效
    Treiberschaltungfüreinen Feldeffekttistoristor在einerHalbbrückenausgangsstufe。

    公开(公告)号:EP0608667A1

    公开(公告)日:1994-08-03

    申请号:EP93830034.0

    申请日:1993-01-29

    CPC classification number: H03K17/0414 H03K17/04123 H03K17/687

    Abstract: A drive circuit for a field-effect transistor (MFET1) which has a drain terminal connected to the positive pole (+Vcc) of the power supply and a source terminal connected to a load (OUT).
    The circuit has circuit means for turning off the field-effect transistor (MFET1) which comprises a first transistor (M1) connected between the gate terminal of the field-effect transistor (MFET1) and the negative pole (GND) of the power supply.
    Said first transistor (MFET1) is driven by an operational amplifier (M3,M4,MR1,MR2,MR3) which has inverting and non-inverting terminals connected to the gate and source terminals of the field-effect transistor (MFET1) respectively.

    Abstract translation: 用于场效应晶体管(MFET1)的驱动电路,其具有连接到电源的正极(+ Vcc)的漏极端子和连接到负载(OUT)的源极端子。 电路具有用于截止场效应晶体管(MFET1)的电路装置,该场效应晶体管包括连接在场效应晶体管(MFET1)的栅极端子和电源的负极(GND)之间的第一晶体管(M1)。 所述第一晶体管(MFET1)由运算放大器(M3,M4,MR1,MR2,MR3)驱动,其运算放大器分别具有连接到场效应晶体管(MFET1)的栅极和源极端子的反相和非反相端子。

    Method and corresponding circuit for detecting an openload
    4.
    发明公开
    Method and corresponding circuit for detecting an openload 失效
    Verfahren undzugehörigerSchaltkreis zur Feststellung einer Schaltungsunterbrechung

    公开(公告)号:EP0743529A1

    公开(公告)日:1996-11-20

    申请号:EP95830204.4

    申请日:1995-05-16

    CPC classification number: G01R31/026 G05B19/0423

    Abstract: The invention relates to a method for detecting an open load by means of a driver having at least one main power transistor (M10) connected to the load (L) and one auxiliary transistor (M11) connected in parallel with the main transistor (M10) between a first power supply voltage reference (Vs) and a second voltage reference (GND), the method providing a comparison between a first voltage (V IN1 ) present on a terminal (S10) connected to the load of the main transistor (M10) and a second voltage (V IN2 ) present on a terminal (S11) of the auxiliary transistor (M11).
    The invention also relates to a circuit for detecting an open load (L), in which the said method is implemented.

    Abstract translation: 本发明涉及一种通过驱动器检测开路负载的方法,所述驱动器具有连接到负载(L)的至少一个主功率晶体管(M10)和与主晶体管(M10)并联连接的一个辅助晶体管(M11) 在第一电源电压基准(Vs)和第二电压基准(GND)之间,提供与存在于连接到主晶体管(M10)的负载的端子(S10)上的第一电压(VIN1)和 存在于辅助晶体管(M11)的端子(S11)上的第二电压(VIN2)。 本发明还涉及一种用于检测开启负载(L)的电路,其中实现了所述方法。

    MOS voltage elevator of the charge pump type
    5.
    发明公开
    MOS voltage elevator of the charge pump type 失效
    MOSSpannungserhöhervom Ladungspumpentype

    公开(公告)号:EP0696839A1

    公开(公告)日:1996-02-14

    申请号:EP94830402.7

    申请日:1994-08-12

    CPC classification number: H02M3/073 H02M3/07

    Abstract: The present invention relates to a charge pump MOS voltage booster and to two applications where said type of booster can find advantageous use.
    The voltage booster comprises instead of the classical diodes, which exhibit undesired voltage drop, four MOS transistors and, instead of the classical single-output oscillator with associated charge transfer condenser, an oscillator with two outputs and two corresponding charge transfer condensers.
    In this manner there are practically no undesired voltage drops and the ripple is reduced without complicating the circuitry structure.

    Abstract translation: 本发明涉及一种电荷泵MOS电压升压器和两种应用,其中所述类型的升压器可以发现有利的用途。 升压器包括代替典型的二极管,其表现出不希望的电压降,四个MOS晶体管,而不是经典的具有相关电荷转移电容器的单输出振荡器,具有两个输出的振荡器和两个相应的电荷转移电容器。 以这种方式,实际上没有不期望的电压降并且纹波减小而不使电路结构复杂化。

    Protection circuit and method for power transistors, voltage regulator using the same
    7.
    发明公开
    Protection circuit and method for power transistors, voltage regulator using the same 失效
    Schutzschaltung und VerfahrenfürLeistungstransistor sowie diese verwendender Spannungsregler

    公开(公告)号:EP0713163A1

    公开(公告)日:1996-05-22

    申请号:EP94830535.4

    申请日:1994-11-17

    CPC classification number: G05F1/573

    Abstract: The purpose of the present invention is to supply a method and a circuit simple and accurate enough to protect at least one transistor against exceeding a complex limit implying processing of multiple electrical quantities associated with said transistor.
    Since in many practical cases said complex limit corresponds to the product of at least two quantities, typically a current and a voltage, the circuit in accordance with the present invention generates electrical signals basically proportional to said quantities, multiplies them, compares the product with a reference signal corresponding to the limit placed on the transistor and acts on the transistor in such a way that said limit is not exceeded.
    Advantageously the multiplication of currents can be provided simply by means of connection in series of bipolar transistor junctions at which said currents are supplied to the respective emitters. In this case it is additionally advantageous to generate the reference signal by means of connection in series of the bipolar transistor junctions in such a manner as to have an analogous behaviour of the multiplier and the generator.

    Abstract translation: 本发明的目的是提供足够简单且准确的方法和电路,以保护至少一个晶体管免受超过复数限制,这意味着与所述晶体管相关联的多个电量的处理。 由于在许多实际情况下,所述复数极限对应于至少两个量(通常为电流和电压)的乘积,所以根据本发明的电路产生与所述量基本成比例的电信号,将其乘以它们,将产品与 参考信号对应于放置在晶体管上的极限,并以不超过所述极限的方式作用在晶体管上。 有利地,电流的乘法可以简单地通过串联双极晶体管结的连接来提供,在该点处,所述电流被提供给相应的发射极。 在这种情况下,另外有利的是通过串联双极晶体管结的连接来产生参考信号,使得具有乘法器和发生器的类似行为。

    Protection method for power transistors, and corresponding circuit
    8.
    发明公开
    Protection method for power transistors, and corresponding circuit 失效
    Verfahren zum Schutz von Leistungstransistoren undübereinstimmendeSchaltung

    公开(公告)号:EP0782235A1

    公开(公告)日:1997-07-02

    申请号:EP95830550.0

    申请日:1995-12-29

    Abstract: The present invention is aimed at providing a method and a circuit for protecting the output stage of a power actuator against voltage transients of the surge type. In particular, it provides protection against voltage surge transients of the kind described by International Standard IEC 801-5, for a power transistor contained in the output stage of the actuator.
    The method of this invention provides for:

    the utilization of the power transistor (PW) intrinsic diode (DP) for dumping the transient energy to one of the supply generator terminals during a positive transient; and
    the utilization of the power transistor (PW) restoration feature to the on state for dumping the energy thereinto during a negative transient, while simultaneously inhibiting the current limiting function.

    The power transistor (PW) is turned on again, and the current limiting circuit (4) inhibited, by the following steps:

    a) generating an electric signal which is substantially proportional to the voltage appearing at the output terminal (OUT) of the actuator;
    b) driving the control terminal (G) of the power transistor (PW) by means of said electric signal, and causing said transistor to conduct, while simultaneously disabling the current limiting circuit (4) when the output voltage exceeds a predetermined threshold; and
    c) allowing the transient energy to be dissipated to the power transistor (PW).

    Abstract translation: 本发明的目的在于提供一种用于保护功率执行器的输出级以防止浪涌型电压瞬变的方法和电路。 特别地,它提供了针对包含在执行器的输出级中的功率晶体管的国际标准IEC 801-5所述类型的电压浪涌瞬变的保护。 本发明的方法提供:功率晶体管(PW)本征二极管(DP)用于在正瞬变期间将瞬态能量倾倒到一个供电发生器端子; 以及在负瞬态期间将功率晶体管(PW)恢复特性应用于导通状态以将能量倾倒在其中,同时抑制电流限制功能。 功率晶体管(PW)再次导通,并且限流电路(4)通过以下步骤来禁止:a)产生基本上与致动器的输出端(OUT)处出现的电压成比例的电信号 ; b)通过所述电信号驱动功率晶体管(PW)的控制端(G),并使所述晶体管导通,同时当所述输出电压超过预定阈值时禁止所述限流电路(4); 以及c)允许瞬态能量被耗散到功率晶体管(PW)。

    Oscillator circuit having oscillation frequency independent from the supply voltage value
    9.
    发明公开
    Oscillator circuit having oscillation frequency independent from the supply voltage value 失效
    Oszillatorschaltung mit einerversorgungsspannungsunabhängigenOszillatorfrequenz

    公开(公告)号:EP0735677A1

    公开(公告)日:1996-10-02

    申请号:EP95830123.6

    申请日:1995-03-31

    CPC classification number: H03K3/011 H03K3/0231 H03K3/354

    Abstract: The oscillating circuit in accordance with the present invention comprises a capacitor C, a charge circuitry CCA and a control circuitry CCO. The charge circuitry CCA includes a first GEN1 and a second GEN2 current generators having respectively a first and a second current values and opposite directions and switching means SW1,SW2 designed to couple alternatively the generators GEN1,GEN2 to the capacitor C. The control circuitry CCO has a voltage input coupled to the capacitor C and an output coupled to control inputs of the switching means SW1,SW2 and includes a comparator with hysteresis having a lower threshold and an upper threshold.
    If for the difference between the upper threshold and the lower threshold a value is chosen essentially proportional to the ratio of the product to the sum of the two current values the oscillation frequency and the duty cycle depend neither on the supply voltage nor the temperature nor the process.

    Abstract translation: 根据本发明的振荡电路包括电容器C,充电电路CCA和控制电路CCO。 充电电路CCA包括分别具有第一和第二电流值和相反方向的第一GEN1和第二GEN2电流发生器,以及设计成将发电机GEN1,GEN2交替耦合到电容器C的开关装置SW1,SW2。控制电路CCO 具有耦合到电容器C的电压输入和耦合到开关装置SW1,SW2的控制输入的输出,并且包括具有较低阈值和较高阈值的滞后的比较器。 如果对于上限阈值和下限阈值之间的差异,则选择一个值基本上与产品与两个电流值之和的比例成比例,振荡频率和占空比既不依赖于电源电压也不依赖于温度, 处理。

    High response and low consumption voltage regulator, and corresponding method
    10.
    发明公开
    High response and low consumption voltage regulator, and corresponding method 失效
    电压调节器具有快速响应时间和低的消耗和相关联的方法

    公开(公告)号:EP0810504A1

    公开(公告)日:1997-12-03

    申请号:EP96830312.3

    申请日:1996-05-31

    CPC classification number: G05F1/575

    Abstract: The invention relates to a voltage regulator connected between first (VS) and second (GND) voltage references and having an output terminal (O1) for delivering a regulated output voltage (Vout), which voltage regulator comprises at least one voltage divider (11), connected between the output terminal (O1) and the second voltage reference (GND), and a serial output element (18) connected between the output terminal (O1) and the first voltage reference (VS), the voltage divider (11) being connected to the serial output element (18) by a first conduction path which includes at least one error amplifier (EA) of the regulated output voltage (Vout) whose output is connected to at least one driver (DR) for turning off the serial output element (18), the voltage regulator comprising, between the voltage divider (11) and the serial output element (18), at least a second conduction path for turning off the serial output element (18) according to the value of the regulated output voltage (Vout), in advance of the action of the first conduction path.
    The invention also concerns a method of turning off a serial output element (18) as a regulated output voltage (Vout) from a voltage regulator (10) changes.

    Abstract translation: 本发明涉及连接第一(VS)和第二(GND)电压基准并且具有输出端(O1)之间用于传递经调节的输出电压(Vout)其中电压调节器包括至少一个分压器的电压调节器(11) ,连接在输出端子(01)和所述第二电压基准(GND),和连接在输出端(O1)和第一参考电压(VS)之间的串行输出元件(18)之间,所述分压器(11)是 通过其中包括一个第一导电通路连接到所述串行输出元件(18)至少一个误差放大器中的调节的输出电压的(EA)(VOUT)的输出连接到至少一个驱动器(DR)用于关断串行输出 元件(18),电压调节器包括:在所述分压器(11)和串行输出元件(18)之间,至少用于关断串行输出元件(18)雅丁到经调节的输出的值的第二导电路径 电压(Vout), 预先在第一导电通路的作用。因此,本发明涉及关闭串行输出元件(18),如从电压调节器(10)的变化的调节的输出电压(Vout)的方法。

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