公开(公告)号：EP0744829A1

公开(公告)日：1996-11-27

申请号：EP95830217.6

申请日：1995-05-22

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Tomasini, Luciano ,  Castello, Rinaldo ,  Bietti, Ivan ,  Clerici, Giancarlo

IPC: H03H1/00 ,  H03F3/45

CPC classification number: H03F3/45475 ,  H03F3/45982 ,  H03F2203/45526

Abstract: The high-pass filter described comprises at least one circuit unit constituted by a first branch (A) and a second branch (B) both connected to an input (IN) of the filter on one side and, on the other side, to an adder (OP) the output of which is the output (OUT) of the filter. The first branch (A) comprises means (Rff) for transferring an input signal substantially without modifying its frequency content, and the second branch (B) comprises a low-pass filter (Rsc, C'fil). The whole is of dimensions such that the components of the input signal with frequencies below the cut-off frequency of the low-pass filter are substantially cancelled out at the output of the adder.
The filter is suitable for being produced within a particularly small area in an integrated circuit.

Abstract translation: 所描述的高通滤波器包括由第一分支（A）和第二分支（B）构成的至少一个电路单元，其两端都连接到一侧的滤波器的输入端（IN），另一侧连接到 加法器（OP），其输出是滤波器的输出（OUT）。 第一分支（A）包括用于基本上不修改其频率内容来传送输入信号的装置（Rff），并且第二分支（B）包括低通滤波器（Rsc，C'fil）。 整体尺寸使得低频滤波器的截止频率以下的输入信号的分量在加法器的输出端基本抵消。 该滤波器适用于在集成电路的特别小的区域内产生。

公开(公告)号：EP0695030A1

公开(公告)日：1996-01-31

申请号：EP94830390.4

申请日：1994-07-29

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Pisati, Valerio ,  Alini, Roberto ,  Castello, Rinaldo ,  Vai, Gianfranco

IPC: H03G1/00 ,  H03F1/08 ,  H03H11/04

CPC classification number: H03F3/45883 ,  H03F3/45286 ,  H03F3/45807 ,  H03F2203/45648 ,  H03G1/0023

Abstract: A controlled gain transconductor (20) which comprises a transconductance stage (3) having at least two input terminals (I1, I2) and at least two output terminals (O1, O2), an active load (4) connected to the output terminals of the transconductance stage and a control circuit (5) for the active load (4) conneccted between said output terminals (O1, O2) and the active load (4).
Also provided is a circuit portion (10) being a replica of the transconductance stage (3), the active load (4) and the control circuit (5). This replicated portion (10) has an output connected to the control circuit (5) of the transconductor (20) to provide a predetermined voltage value (Vc) required for adjusting the DC gain of the device.

Abstract translation: 一种受控增益跨导体（20），包括具有至少两个输入端（I1，I2）和至少两个输出端（O1，O2）的跨导级（3），连接到输出端 所述跨导级和用于所述输出端子（O1，O2）和所述有源负载（4）之间连接的有源负载（4）的控制电路（5）。 还提供了作为跨导级（3），有源负载（4）和控制电路（5）的复制品的电路部分（10）。 该复制部分（10）具有连接到跨导体（20）的控制电路（5）的输出端，以提供调节器件的直流增益所需的预定电压值（Vc）。 $$

公开(公告)号：EP0690562A1

公开(公告)日：1996-01-03

申请号：EP94830324.3

申请日：1994-06-30

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Rezzi, Francesco ,  Baschirotto, Andrea ,  Castello, Rinaldo

IPC: H03F3/45 ,  H03H11/04

CPC classification number: H03F3/45076 ,  H03F2200/261 ,  H03H11/0433

Abstract: The invention relates to a transconductor circuit with a differential input and a single output, comprising two input transistors (M1, M2) whose primary conduction terminals (D1, S1, D2, S2) are respectively connected together; in this way, variations in load current and voltage can be made lower, thereby also lowering distortion from changes in their transconductance.

Abstract translation: 本发明涉及一种具有差分输入和单输出的跨导电路，包括其一次导通端子（D1，S1，D2，S2）分别连接在一起的两个输入晶体管（M1，M2） 以这种方式，可以降低负载电流和电压的变化，从而也降低其跨导变化的变形。 $$

公开(公告)号：EP0587966A1

公开(公告)日：1994-03-23

申请号：EP92830498.9

申请日：1992-09-16

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Tomasini, Luciano ,  Castello, Rinaldo

IPC: H04M19/08

CPC classification number: H04M19/08

Abstract: A certain amount of DC supply current derivable from a subscriber's line (VL, GROUND) is used for powering at respective regulated voltages a plurality of functional circuits (A,B...) of an equipment connectable to the line. A sensible energy saving can be achieved by splitting the valuable current among the functional circuits, on account of their priority rank, by using at least a differential pair of current delivering transistors (P2,P3). A special circuit monitors the actual current of absorption of the functional circuit of highest rank (A) and produces a control signal that is used for modifying the drive conditions of the current delivering transistors. The current waste caused by sinking a design maximum current through a dissipative shunt voltage regulator of each functional circuit as done in the prior art circuits, is prevented and all the current exceeding the actual absorption needs of the highest rank functional circuit may be distributed to the other functional circuits without waste. This same principle may be advantageously applied also to functional circuits of lesser and lesser rank of priority for maximizing the saving.

Abstract translation: 可以从用户线路（VL，GROUND）导出的一定量的直流电源电流用于向各个调节电压供电可连接到线路的设备的多个功能电路（A，B ...）。 通过使用至少一个差分对的电流输送晶体管（P2，P3），通过分配功能电路中的有价值的电流，由于它们的优先等级可以实现明智的节能。 专用电路监控最高等级（A）的功能电路的实际吸收电流，并产生用于修改电流输送晶体管的驱动条件的控制信号。 通过在现有技术电路中通过每个功能电路的耗散分流电压调节器设计最大电流引起的当前浪费被防止，并且超过最高功能电路的实际吸收需要的所有电流可以分配到 其他功能电路无浪费。 这个相同的原理也可以有利地应用于功能电路的优先级越来越少，从而最大化节省。

公开(公告)号：EP0394703A3

公开(公告)日：1991-02-06

申请号：EP90106132.5

申请日：1990-03-30

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Nicollini, Germano ,  Castello, Rinaldo

IPC: H03F3/45 ,  H03F1/32

CPC classification number: H03F3/45179 ,  H03F3/45183 ,  H03F2203/45026 ,  H03F2203/45036 ,  H03F2203/45192 ,  H03F2203/45251 ,  H03F2203/45288 ,  H03F2203/45318 ,  H03F2203/45658

Abstract: A circuit arrangement (1) for enhancing the transconductance (gm) of a differential amplifier stage (2) comprising a pair of MOS transistors (M1,M2), having respective source electrodes (S1,S2) connected together through a circuit node (N), comprises a pair of active components (M3,M4) respectively connected in each of the connections between the aforesaid electrodes (S1,S2) and the aforesaid node (N) and serving a characteristic function corresponding to that of a negative value resistor (-R). This arrangement (1) enables the transconductance (gm) of the differential stage (2) to be increased while keeping the dissipated electric power low and the area occupied in an integrated circuit small.

公开(公告)号：EP0350857A1

公开(公告)日：1990-01-17

申请号：EP89112654.2

申请日：1989-07-11

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Castello, Rinaldo ,  Ferro, Marco ,  Salerno, Franco ,  Tomasini, Luciano

IPC: G05F3/20 ,  G05F3/30

CPC classification number: G05F3/30 ,  G05F3/20

Abstract: The source is apt to generate a fully-differential reference voltage at the output terminals, whereto precisely-­balanced loads are applied. The voltage reference is obtained from a bandgap voltage source fed with currents proportional to the temperature, in order to minimize thermal voltage variations. Suitable circuits for starting the normal source operation after switching on are also provided.

Abstract translation: 源极易于在输出端产生完全差分的参考电压，并施加精确平衡的负载。 电压基准是从馈入与温度成比例的电流的带隙电压源获得的，以便最小化热电压变化。 还提供了用于在接通之后启动正常源操作的合适电路。

公开(公告)号：EP0847137A1

公开(公告)日：1998-06-10

申请号：EP96830603.5

申请日：1996-12-04

Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.

Inventor： Rezzi, Francesco ,  Castello, Rinaldo ,  Cazzaniga, Marco ,  Bietti,Ivan

IPC: H03H11/04

CPC classification number: H03H11/0433

Abstract: The invention relates to an elementary biquadratic cell for programmable time-continous analog filters, which is placed between a first supply voltage reference (Vdd) and a second voltage reference (GND) and is of a type having at least one pair of input terminals (I31,I31') and first (O31,O31') and second (O32,O32') pairs of output terminals, and having a pair of half-cells (31,31'), which half-cells are structurally identical with each other and each comprised of at least a first transistor (T31,T31') placed between the first (Vdd) and the second (GND) voltage reference and having a base terminal connected to a respective one of the input terminals (I31,I31').
Each half-cell (31,31') further comprises second (T32,T32') and third (T33,T33') transistors placed between the first (Vdd) and second (GND) voltage references, the second transistor (T32,T32') having a base terminal connected to the first output terminal (O31,O31') of the first pair of output terminals and a collector terminal connected to the second output terminal (O32,O32') of the second pair of output terminals, and the third transistor (T33,T33') having an emitter terminal connected to the first output terminal (O31,O31') of the first pair of output terminals ad a base terminal connected to the second output terminal (O32',O32) of the second pair of output terminals of the other half-cell.

Abstract translation: 本发明涉及一种用于可编程时间连续模拟滤波器的基本二次电池，其放置在第一电源电压基准（Vdd）和第二参考电压（GND）之间，并且是具有至少一对输入端子 I31，I31'）和第一（O31，O31'）和第二（O32，O32'）输出端对，并具有一对半电池（31,31'），这些半电池与每个半电池结构相同 至少第一晶体管（T31，T31'）由第一（Vdd）和第二（GND）电压基准之间的第一晶体管（T31，T31'）构成，并具有连接到输入端子（I31，I31' ）。 放置在第一（Vdd）和第二（GND）电压基准之间的第二（T32，T32'）和第三（T33，T33'）晶体管的每个半电​​池（31,31'）还包括第二晶体管（T32，T32' '）具有连接到第一对输出端子的第一输出端子（O31，O31'）的基极端子和与第二对输出端子的第二输出端子（O32，O32'）连接的集电极端子，以及 第三晶体管（T33，T33'）具有连接到第一对输出端子的第一输出端子（O31，O31'）的发射极端子和连接到第二输出端子的第二输出端子（O32'，O32）的基极端子 另一个半电池的第二对输出端子。

公开(公告)号：EP0836274A1

公开(公告)日：1998-04-15

申请号：EP96830523.5

申请日：1996-10-11

Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.

Inventor： Baschirotto, Andrea ,  Nagari, Angelo ,  Castello, Rinaldo

IPC: H03H1/00 ,  H03F3/00 ,  H03F3/45

CPC classification number: H03F3/005 ,  H03F3/45946 ,  H03F2203/45421

Abstract: In switch-capacitor systems for extremely low supply voltage, employing fully differential switched op-amp, proper functioning of nMOS switches coupled to the inverting input node of an integrated stage capable of outputting a common mode control signal, is may possible by retaining the ground potential on the input node to prevent body effects on the threshold of nMOS switches by means of an auxiliary switched capacitor.

Abstract translation: 在采用完全差分开关运算放大器的开关电容器系统中，使用全差分开关运算放大器，可以通过保持接地来耦合耦合到能够输出共模控制信号的集成级的反相输入节点的nMOS开关的正常工作 输入节点上的电位，以通过辅助开关电容器来防止身体对nMOS开关阈值的影响。

公开(公告)号：EP0739120A1

公开(公告)日：1996-10-23

申请号：EP95830138.4

申请日：1995-04-11

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Tomasini, Luciano ,  Castello, Rinaldo ,  Bietti, Ivan ,  Clerici, Giancarlo

IPC: H04M1/00 ,  H04M1/58 ,  H04M1/76 ,  H04B1/58

CPC classification number: H04M1/585 ,  H04B1/586 ,  H04M1/76

Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted.
In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.

Abstract translation: 所描述的语音电路通过借助于包括单个电阻器（11）的正反馈回路合成复阻抗来匹配电话线路的阻抗，并通过从信号提取的减法器（20'）消除侧音 （Va）与来自所述发送信号的信号（Vb）相对应。 为了实现不受在用于合成阻抗的电路中产生的噪声的侧音的抵消，通过在输出端处理存在于电阻器（11）中的信号，导出与要发送的信号相关的信号（Vb） 的反馈回路。

公开(公告)号：EP0394703B1

公开(公告)日：1995-12-13

申请号：EP90106132.5

申请日：1990-03-30

Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.

Inventor： Nicollini, Germano ,  Castello, Rinaldo

IPC: H03F3/45 ,  H03F1/32

CPC classification number: H03F3/45179 ,  H03F3/45183 ,  H03F2203/45026 ,  H03F2203/45036 ,  H03F2203/45192 ,  H03F2203/45251 ,  H03F2203/45288 ,  H03F2203/45318 ,  H03F2203/45658