Abstract:
The fuzzy filtering of a noise signal comprising a plurality of signal samples [s(t,k)] is carried out using as variables the variation of the signal in the considered window and the distance of the samples from a sample to be reconstructed, so as to distinguish the typical variations of the original signal from those due to the noise and to identify the signal fronts. The method comprises the steps of: defining a current signal sample [s(t)] from among the plurality of signal samples; calculating a plurality of difference samples [D(t,k)] as difference in absolute value between the current signal sample and each signal sample; defining distance values (k) between the current signal sample and each signal sample; determining weight parameters [P(k)] on the basis of the difference samples and the distance values by means of fuzzy logic; and weighing the signal samples with the weight parameters so as to obtain a reconstructed signal sample [o(t)].
Abstract:
An architecture for an electronic controller operated using fuzzy logic, including an input section (3) with a plurality of inputs for analog or digital signals, a central control unit (5) provided with memories (7) wherein fuzzy logic membership functions are stored, and a defuzzyfier section (15), has its input section (3) composed of a plurality of fuzzyfiers (10) arranged in parallel and independent of one another, each fuzzyfier including an analog input (IiA) and a digital input (IiD) for receving signals from external sensors, and digital outputs connected to the input of a corresponding read-only memory (7) of the central unit to select the address of a memory word.
Abstract:
A method for setting up the memories of an electronic controller operated in a fuzzy logic manner whereby membership functions (µ(x)) of logic variables are subjected to inference operations which are configured as a set of (IF-THEN) rules, each having at least one fore (IF) preposition and at least one consequent (THEN) implication, is arranged to store the data about a set of membership functions tied to the fore (IF) parts of the (IF-THEN) rules separately from the data associating each logic variable (X) with a corresponding one of the membership functions in said set.
Abstract:
A fuzzy logic electronic controller whereby predetermined membership functions µ(x) of logic (X) variables are subjected to so-called inference operations configured essentially as IF-THEN rules with at least one front preposition and at least one rear implication, and being of a kind which comprises an input or fuzzyfier section having a plurality of inputs for analog or digital signals, a central control unit or fuzzy controller core placed after said input section and being provided with memories, and an output section or defuzzyfier connected after the central unit to convert the results of the inference operations back to analog or digital signals, comprises: a plurality of fuzzyfiers (10) being disposed in parallel within said input section (3) and each led to a pair of analog and digital inputs (I iA ,I iD ), a plurality of storage modules (7) corresponding in number to said fuzzyfiers (10) and containing data of the front (IF) prepositions only of said rules, a fuzzy controller inference unit (11) active in the central control unit (5) to carry out logic operations based on said inference rules of the fuzzy logic by extracting data from said memories (7) through an interfacing circuit (9), and an additional memory (13) connected between the fuzzy controller inference unit (11) and the defuzzyfier (15) and adapted to contain data pertaining to the rear (THEN) implications only of said inference rules.
Abstract:
An architecture for an electronic controller operated using fuzzy logic, including an input section (3) with a plurality of inputs for analog or digital signals, a central control unit (5) provided with memories (7) wherein fuzzy logic membership functions are stored, and a defuzzyfier section (15), has its input section (3) composed of a plurality of fuzzyfiers (10) arranged in parallel and independent of one another, each fuzzyfier including an analog input (IiA) and a digital input (IiD) for receving signals from external sensors, and digital outputs connected to the input of a corresponding read-only memory (7) of the central unit to select the address of a memory word.
Abstract:
The Warren Instruction Set for the relative abstract machine designed for the execution of Prolog programs is coded by means of a two part opcode. The first part has a fixed, 8-bit format and the second part may have a variable format of 8 or of 32 bits containing the value of a respective register or registers. The fourth and the eighth bit of the first part of the opcode are exploited for interrupting the decoding step, in order to reduce the execution times and for signalling the presence of a second part of opcode with a 32 bit format containing the value of a certain register.
Abstract:
The Warren Instruction Set for the relative abstract machine designed for the execution of Prolog programs is coded by means of a two part opcode. The first part has a fixed, 8-bit format and the second part may have a variable format of 8 or of 32 bits containing the value of a respective register or registers. The fourth and the eighth bit of the first part of the opcode are exploited for interrupting the decoding step, in order to reduce the execution times and for signalling the presence of a second part of opcode with a 32 bit format containing the value of a certain register.