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1.发明授权
公开(公告)号：EP0463418B1
公开(公告)日：1998-07-29
申请号：EP91109162.7
申请日：1991-06-05
Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.
Inventor： Gornati, Silvano , Merlo, Mauro , Zuffada, Maurizio , Lietar, Loic
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2.发明授权Method and electronic circuit for automatically measuring the horizontal scan frequency of a composite synchronism signal 失效一种用于自动测量的复合同步信号的水平扫描频率的方法和电子电路。
公开(公告)号：EP0442081B1
公开(公告)日：1995-03-01
申请号：EP90123965.7
申请日：1990-12-12
Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.
Inventor： Gornati, Silvano , Betti, Giorgio , Sacchi, Fabrizio , Vai, Gianfranco , Zuffada, Maurizio
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3.发明授权Device for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator 失效安排一个Demodulationsnorm的自动选择与Zwischenfrequenzdemodulator可用的视频信号。
公开(公告)号：EP0320641B1
公开(公告)日：1994-12-28
申请号：EP88119205.8
申请日：1988-11-18
Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.
Inventor： Zuffada, Maurizio , Sacchi, Fabrizio
IPC: H04N5/46
CPC classification number: H04N5/46
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4.发明公开Device for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator 失效用于自动选择视频信号的解调标准的方法和装置，可用于中间频率解调器
公开(公告)号：EP0320641A3
公开(公告)日：1991-10-09
申请号：EP88119205.8
申请日：1988-11-18
Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
Inventor： Zuffada, Maurizio , Sacchi, Fabrizio
IPC: H04N5/46
CPC classification number: H04N5/46
Abstract: A method, and related device, for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator (2), which has an output (13) for the demodulated signal and a so-called standard selecting input pin (12), consists of detecting the polarity of the demodulated signal at the output (13) of the demodulator (2) and comparing that polarity with the polarity of the input signal to the demodulator (2). The voltage value on the standard selecting pin (12) is changed over on detecting a different modulation polarity between the input and output video signals to/from the demodulator (2) to enable the latter to operate to the correct standard at all times.
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5.发明公开Voltage-controlled variable oscillator, in particular for phase-lock loops 失效Spannungsgesteuerter variabler Oszillator，insbesonderefüreinen Phasenregelkreis。
公开(公告)号：EP0412435A2
公开(公告)日：1991-02-13
申请号：EP90114831.2
申请日：1990-08-02
Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
Inventor： Betti, Giorgio , Zuffada, Maurizio
IPC: H03B5/12
CPC classification number: H03B5/1231 , H03B5/1209 , H03B5/1215 , H03B5/1221 , H03B5/1243 , H03B2200/0062
Abstract: The voltage-controlled oscillator, comprises a differential stage formed by a pair of transistors ( T₃ and T₄) whose collectors define the output terminals between which an external resonating circuit (LC) is connected. A voltage generator (1) is connected between the two output terminals (A, B) and is suitable for generating a voltage which is proportional to the terminal voltage that exists across the resonating circuit (LC). The voltage generator output signal is applied to the resonation circuit (LC) through a pair of capacitors (Cs) to control the oscillating frequency. A bias current adjustment block (2) varies the bias current (Io) of the differential stage as the operating frequency varies in order to stabilize the peak-to-peak value of the output signal.
Abstract translation: 压控振荡器包括由一对晶体管（T3和T4）形成的差分级，其集电极限定了连接外部谐振电路（LC）的输出端子。 电压发生器（1）连接在两个输出端子（A，B）之间，适用于产生与谐振电路（LC）两端存在的端子电压成比例的电压。 电压发生器输出信号通过一对电容器（Cs）施加到谐振电路（LC），以控制振荡频率。 偏置电流调节块（2）随着工作频率的变化而改变差动级的偏置电流（Io），以稳定输出信号的峰 - 峰值。
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Patent Agency Ranking6.发明公开Device for processing servo signals in a parallel architecture PRML reading apparatus for hard disks 失效一种在读取装置为硬盘执行的并行处理体系结构的伺服信号的设备。
公开(公告)号：EP0684608A1
公开(公告)日：1995-11-29
申请号：EP94830235.1
申请日：1994-05-23
Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
Inventor： Zuffada, Maurizio , Gadducci, Paolo , Moloney, David , Pisati, Valerio
CPC classification number: G11B20/10009 , G11B21/106
Abstract: The device is to be used with a parallel architecture PRML reading apparatus comprising a variable-gain input amplifier (21), a low-pass analog filter (22), a transversal analog filter (23) and two distinct and parallel processing channels (24, 34) interposed between the transversal analog filter (23) and an RLL-NRZ decoder (25). The two processing channels (24, 34) comprise respective analog-digital converters (26, 36) and respective Viterbi detectors (27, 37) and operate according to sampling sequences that alternate with one another. The device (30) for processing the servo signals comprises a rectifier (31) connected to the outputs of said analog-digital converters (26, 36) and an integrator (32).
Abstract translation: 该装置是用一个并行架构PRML读取装置，包括一个可变增益输入放大器（21），一个低通模拟滤波器（22），横向模拟滤波器（23）和两个不同的和并行处理通道（24中使用 ，34）横向模拟滤波器（23）和解码器，以RLL NRZ（25之间）。 所述两个处理通道（24，34）包括respectivement模拟 - 数字转换器（26，36）和相应的Viterbi检测（27，37）和操作根据采样序列并彼此交替。 用于处理所述伺服信号的装置（30）包括连接到所述模拟 - 数字转换器的输出（26,36），并在积分器（32）的整流器（31）。
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公开(公告)号：EP0394805B1
公开(公告)日：1995-02-22
申请号：EP90107222.3
申请日：1990-04-17
Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.
Inventor： Betti, Giorgio , Zuffada, Maurizio , Sacchi, Fabrizio , Gornati, Silvano
IPC: G05F3/22
CPC classification number: G05F3/225 , Y10S323/907
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8.发明公开Control loop for reducing the time of response of a tuner-AGC of a superheterodyne receiver and relative leading edge differentiating circuit used in the control loop 失效用于减少超外差接收机调谐器的自动增益控制的响应时间和相关联的用于边缘相对上升微分电路的控制回路。
公开(公告)号：EP0439435A2
公开(公告)日：1991-07-31
申请号：EP91830006.2
申请日：1991-01-17
Applicant: SGS-THOMSON MICROELECTRONICS s.r.l.
Inventor： Gornati, Silvano , Betti, Giorgio , Sacchi, Fabrizio , Vai, Gianfranco , Zuffada, Maurizio
IPC: H03G3/30
CPC classification number: H03G3/3068
Abstract: In a dynamic automatic loop for control of the overall gain of an input circuit of a superheterodyne receiver, the response time of the HF-AGC circuit of the TUNER, in response to the action of the TUNER DELAY circuit activated by the IF-AGC in the case of autonomously uncontrollable abrupt increases in the level of the antenna signal from the same HF-AGC of the TUNER, is markedly reduced using an additional TUNER DELAY PLUS circuit able to absorb for a determined interval of time, a discharge current from the storage capacitor the control voltage of the HF-AGC in addition to the discharge current absorbed by the existing TUNER DELAY circuit. The relevant intensity of this additional discharge current and its duration are optimized by way of suitable circuital arrangements in the design of said TUNER DELAY PLUS circuit. The response time is reduced without modifying the time constant of the HF-AGC, which cannot be freely reduced because of inter- and cross-modulation problems.
Abstract translation: 在响应于TUNER延迟电路由IF AGC活化作用的动态自动环路用于超外差式接收机中，调谐器的RF AGC电路的响应时间，的输入电路的总增益的控制 自主地不可控的情况下，在从调谐器的相同的RF AGC的天线信号的电平突然增加，显着地使用附加的TUNER延迟加上电路能够吸收的时间确定的开采间隔，从所述存储的放电电流的减少 电容器控制所述RF AGC的电压除了由现有的TUNER延迟电路所吸收的放电电流。 该附加的放电电流和它的持续时间的相关强度是通过在所述调谐器延迟加上电路的设计合适circuital安排方式优化。 响应时间，而无需修改RF AGC，不能自由地减少由于间和交叉调制问题的时间常数减小。
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9.发明公开Intergrated circuit for generating a temperature independent, dynamically compressed voltage, function of the value of an external regulation resistance 失效集成电路，用于产生一个与温度无关的动态压缩电压是外部控制的电阻的函数。
公开(公告)号：EP0388369A2
公开(公告)日：1990-09-19
申请号：EP90830077.5
申请日：1990-03-01
Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
Inventor： Sacchi, Fabrizio , Zuffada, Maurizio , Betti, Giorgio , Gornati, Silvano
IPC: H03G3/10
CPC classification number: H03G3/10
Abstract: A conversion circuit generates a temperature- independent, dynamically compressed DC control voltage from an external regulation potentiometer. The conversion circuit uses a current mirror (T4,T5,T6) to convert linear variations in voltage (Vp) across the regulation potentiometer (Rt) into a logarithmic differential voltage between two output terminals (3, 4). One differential output (3) is fed to a unitary gain stage (B) which is blassed by a current generator (Ip) having a temperature coefficent corresponding to the reciprocal of the temperature coefficient of the integrated resistances. The output (5) of the unitary gain stage and the second current mirror output (4) are fed to a differential amplifier (C), which is also biassed by a current generator (Id) having a temperature coefficient corresponding to the reciprocal of the coefficient of the integrated resistances. On the output of the differential amplifier (6) is the required temperature-independent, dynamically compressed DC control voltage. The circuit is particularly useful for generating a control current for an AGC system.
Abstract translation: A转换电路基因率温度 - 独立的，动态压缩DC控制从罐的外部调节电压。 转换电路使用的电流镜（T4，T5，T6），以线性变化转换成横跨调节电位器（RT）电压（V p）成一个对数的差分电压两个输出端子之间（3，4）。 一个差动输出端（3）被供给到由具有温度系数对应于集成termoresistencias的温度系数的倒数的电流发生器（IP）blassed一个整体增益级（B）所有。 单一增益级和第二电流镜输出的输出（5）（4）被馈送到差分放大器（C），所有这些因此由具有温度系数对应于的倒数的电流发生器（Id）的偏压 集成termoresistencias的系数。 在差动放大器（6）的输出为所需要的温度无关的，动态压缩DC控制电压。 该电路是在AGC系统中产生的控制电流为特别有用。
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10.发明公开Generating a stop signal of an automatic search procedure for a broadcasting station using an available AFC signal 失效使用可用的AFC信号生成广播站的自动搜索程序的停止信号
公开(公告)号：EP0326527A3
公开(公告)日：1990-08-16
申请号：EP89830024.9
申请日：1989-01-25
Applicant: SGS-THOMSON MICROELECTRONICS S.r.l.
Inventor： Zuffada, Maurizio , Sacchi, Fabrizio
IPC: H03J7/28
CPC classification number: H03J7/28
Abstract: During an automatic search scan of a broadcasting station of a video receiver's tuner, the AFC signal generated by an existing automatic frequency control circuit of the receiver is applied to an input of four comparators. A first, switched threshold comparator (I) commutes when the AFC signal is greater than the two switched threshold values
VA' VA";
and enables a second comparator (II) with a fixed threshold V1 which has a value between the threshold values VA' and VA" of the first comparator. When the second comparator commutes it causes the generation by an output buffer (B) of a signal suitable for arresting the automatic search scan. When the automatic search scan is performed in the opposite direction, a similar detecting function is performed by means of a third (III), switched threshold, comparator commuting when the AFC signal is lower than the two switched threshold values:
VB' > AFC
and enables a fourth comparator (IV), with a fixed threshold V2 which has a value between the two threshold values VB' and VB" of the third comparator, and which by commuting causes the generation, by the same output buffer, of the arresting signal.
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