Process for fabricating MOS semiconductor transistor
    1.
    发明授权
    Process for fabricating MOS semiconductor transistor 失效
    制造MOS半导体晶体管的工艺

    公开(公告)号:US6444532B2

    公开(公告)日:2002-09-03

    申请号:US88336801

    申请日:2001-06-19

    Applicant: SHARP KK

    CPC classification number: H01L29/6659

    Abstract: A process for fabricating a MOS semiconductor transistor which includes a first oxide film on a semiconductor substrate and on a surface of a gate electrode formed on the semiconductor substrate with intervention of a gate insulating film, a nitride film on the first oxide film and a sidewall spacer of a second oxide film formed on a side of the gate electrode with intervention of the first oxide film and the nitride film, the process comprising the steps of: forming, on the nitride film, a photoresist mask which has an opening in a device formation region; implanting impurity ions through the nitride film and the first oxide film into the semiconductor substrate in a high concentration using the gate electrode, the sidewall spacer and the photoresist mask as a mask; selectively removing the sidewall spacer from the device formation region by wet etching; implanting impurity ions into the semiconductor substrate in a low concentration using the gate electrode and the photoresist mask as a mask, thereby forming an LDD structure; removing the photoresist mask; and thermally treating the resulting semiconductor substrate.

    Abstract translation: 一种用于制造MOS半导体晶体管的工艺,其包括在半导体衬底上的第一氧化物膜和形成在半导体衬底上的栅电极的表面上,介入了栅极绝缘膜,第一氧化膜上的氮化物膜和侧壁 在所述第一氧化膜和所述氮化物膜的干涉下形成在所述栅电极的一侧上的第二氧化物膜的间隔物,所述方法包括以下步骤:在所述氮化物膜上形成在器件中具有开口的光致抗蚀剂掩模 形成区; 使用栅电极,侧壁间隔物和光致抗蚀剂掩模作为掩模,将杂质离子以高浓度注入氮化物膜和第一氧化物膜到半导体衬底中; 通过湿式蚀刻从器件形成区域选择性地去除侧壁间隔物; 使用栅电极和光刻胶掩模作为掩模,以低浓度将杂质离子注入到半导体衬底中,从而形成LDD结构; 去除光致抗蚀剂掩模; 并对所得的半导体衬底进行热处理。

    MIRROR DISPLAY, HALF MIRROR PLATE, AND ELECTRONIC DEVICE
    3.
    发明公开
    MIRROR DISPLAY, HALF MIRROR PLATE, AND ELECTRONIC DEVICE 审中-公开
    SPIEGELANZEIGE,HALBSPIEGELPLATTE UND ELEKTRONISCHE VORRICHTUNG

    公开(公告)号:EP2947506A4

    公开(公告)日:2016-07-13

    申请号:EP14740947

    申请日:2014-01-15

    Applicant: SHARP KK

    Abstract: The present invention provides a mirror display which prevents the boundary line between a frame region and a display region from being observed in a mirror mode and which thus has improved design quality. The mirror display of the present invention includes a half mirror plate including a half mirror layer, and a display device disposed behind the half mirror plate, the display device including a display panel and a frame component that supports a peripheral portion of the display panel, and the mirror display including a reflectance adjuster that makes equal the reflectance in a display region where the half mirror layer and the display panel face each other and the reflectance in a frame region where the half mirror layer and the frame component face each other.

    Abstract translation: 本发明提供了一种可以防止框架区域和显示区域之间的边界线在镜面模式下被观察并因此具有改进的设计质量的反射镜显示器。 本发明的反射镜显示装置包括:半透半反镜面板,包括半透半反镜层;以及显示装置,设置在半反射镜后面,该显示装置包括显示面板和支撑显示面板的周边部分的框架部件, 并且镜子显示器包括反射调节器,该反射调节器使得半反射镜层和显示面板彼此面对的显示区域中的反射率和半反射镜层和框架部件相对的框区域中的反射率相等。

    dispositivo com tela de cristal líquido

    公开(公告)号:BR112012007789A2

    公开(公告)日:2016-08-30

    申请号:BR112012007789

    申请日:2010-05-20

    Applicant: SHARP KK

    Abstract: patente de invenção: dispositivo com tela de cristal líquido. a presente invenção fornece um dispositivo com tela de cristal líquido que pode atingir altos índices de contraste em uma ampla variedade de ângulos de visualização e reduzem a coloração durante a exibição preta. o dispositivo com tela de cristal líquido de acordo com a presente invenção inclui um polarizador, uma primeira placa de quarto-de-onda adaptada para satisfazer nx > ny nz, uma célula de cristal líquido verticalmente alinhada, uma segunda placa quarto-de-onda fornecida substancialmente com o mesmo fator nz que da primeira placa de quarto-de-onda e adaptada para satisfazer nx > ny nz, uma camada birrefringente adaptada para satisfazer nx nz e, um polarizador, todos dos quais são empilhados nesta ordem, em que a célula de cristal líquido inclui uma camada de cristal líquido e camadas de filtro nas cores azul, verde, e vermelho e satisfazer pelo menos uma das expressões abaixo: r(b)/r(g) > n(b)/ n(g), r(r)/r(g) n(r)/ n(g) onde r(b), r(g), e r(r) representa a diferença da fase perpendicular da célula de cristal líquido em comprimentos de onda de 450 nm, 550 nm, e 650 nm, respectivamente, e n(b), n(g), e n(r) representam valores de birrefrigência de um material de cristal líquido da camada de cristal líquido em comprimentos de onda de 450 mm, 550 nm, e 650 nm, respectivamente.

    THREE-DIMENSIONAL VIDEO RECOGNITION SYSTEM, VIDEO DISPLAY DEVICE AND ACTIVE SHUTTER GLASSES
    6.
    发明公开
    THREE-DIMENSIONAL VIDEO RECOGNITION SYSTEM, VIDEO DISPLAY DEVICE AND ACTIVE SHUTTER GLASSES 审中-公开
    3D视频检测系统,视频显示设备和动态光圈DISCS THEREOF

    公开(公告)号:EP2500764A4

    公开(公告)日:2013-04-17

    申请号:EP10829744

    申请日:2010-07-06

    Applicant: SHARP KK

    Abstract: The present invention is to provide a three-dimensional video recognition system, a video display device, and active shutter glasses (AS) in which, even when the observer's visual point and the inclination of the observer's face are changed, the reduction in the brightness of the screen can be suppressed, and in which a sufficient shutter effect can be obtained. The present invention provides a three-dimensional video recognition system that is featured by including a display device, a front plate, and AS glasses, and is featured in that each of the AS glasses includes a first »/4 plate, a first linear polarizing element, a liquid crystal cell, and a second linear polarizing element in this order from the outer surface side, in that the display device includes a third linear polarizing element on an observation surface side of the display device, in that the front plate has a second »/4 plate, and in that, when an angle formed between a transmission axis of the first linear polarizing element and an in-plane slow axis of the first »/4 plate is defined as Æ1, and when an angle formed between a transmission axis of the third linear polarizing element and an in-plane slow axis of the second »/4 plate is defined as Æ2, expressions of 40° ‰¤ Æ1 ‰¤ 50° and of 40° ‰¤ Æ2 ‰¤ 50°, or expressions of 130° ‰¤ Æ1 ‰¤ 140°and of 130° ‰¤ Æ2 ‰¤ 140° are satisfied, where Æ1 and Æ2 are measured as viewed from the side of the »/4 plate and are measured in the counterclockwise direction taken as the positive direction with reference to the transmission axis of the linear polarizing element.

    9.
    发明专利
    未知

    公开(公告)号:DE69120875D1

    公开(公告)日:1996-08-22

    申请号:DE69120875

    申请日:1991-08-05

    Applicant: SHARP KK

    Abstract: A method for manufacturing a semiconductor device including steps of (i) laminating a first insulating film over a semiconductor substrate having a plurality of gate electrodes, on which side walls are at least formed, through capacitor formation regions, removing the first insulating film in the capacitor formation region so as to form a direct contact, and laminating a first conductive film over the semiconductor substrate including the residual first insulating film, (ii) removing the first conductive film with remaining at least in the capacitor formation region, (iii) sequentially laminating over the semiconductor substrate including the residual first conductive film (a) a second insulating film, a second conductive film and a third insulating film, or (b) a second insulating film and a second conductive film, and then laminating a resist layer over the whole surface, and (iv) patterning the resist layer and removing with the use of a resist pattern (a) the third insulating film, second conductive film, second insulating film and first conductive film, or (b) the second conductive film, second insulating film and first conductive film, so that the capacitor electrodes of a FEC type DRAM cell including a capacitor upper electrode, a capacitor insulating film and a capacitor lower electrode can be formed in the capacitor formation region.

    10.
    发明专利
    未知

    公开(公告)号:DE69120875T2

    公开(公告)日:1997-01-23

    申请号:DE69120875

    申请日:1991-08-05

    Applicant: SHARP KK

    Abstract: A method for manufacturing a semiconductor device including steps of (i) laminating a first insulating film over a semiconductor substrate having a plurality of gate electrodes, on which side walls are at least formed, through capacitor formation regions, removing the first insulating film in the capacitor formation region so as to form a direct contact, and laminating a first conductive film over the semiconductor substrate including the residual first insulating film, (ii) removing the first conductive film with remaining at least in the capacitor formation region, (iii) sequentially laminating over the semiconductor substrate including the residual first conductive film (a) a second insulating film, a second conductive film and a third insulating film, or (b) a second insulating film and a second conductive film, and then laminating a resist layer over the whole surface, and (iv) patterning the resist layer and removing with the use of a resist pattern (a) the third insulating film, second conductive film, second insulating film and first conductive film, or (b) the second conductive film, second insulating film and first conductive film, so that the capacitor electrodes of a FEC type DRAM cell including a capacitor upper electrode, a capacitor insulating film and a capacitor lower electrode can be formed in the capacitor formation region.

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