Abstract:
A pixel cell, a method for manufacturing the same and an image sensor comprising the same are provided. The pixel cell comprises: a substrate (101); a photodiode (103), a pass transistor (107) and a floating diffusion structure (104) respectively formed on the substrate (101), in which the pass transistor (107) is formed between the photodiode (103) and the floating diffusion structure (104); and a PINNED structure (105), formed on the substrate (101) and connected with the floating diffusion structure (104), in which a reset voltage of the floating diffusion structure (104) is higher than a depletion voltage of the PINNED structure (105).
Abstract:
A pixel array and a pixel unit are provided. A pixel array comprises: a plurality of pixel rows (100), each pixel row (100) comprising a plurality of pixel units (101), in which a length of a pixel unit (101) is twice of a height of the pixel unit (101), any two adjacent pixel rows (100) are staggered, and a staggered distance between the any two adjacent pixel rows (100) is equal to the height of the pixel unit (101). A pixel array comprises: a plurality of pixel columns (200), each pixel column (200) comprising a plurality of pixel units (201), in which a height of each pixel unit (201) is twice of a length of the pixel unit (201), any two adjacent pixel columns (200) are staggered, and a staggered distance between the any two adjacent pixel columns (200) is equal to the length of the pixel unit (201).
Abstract:
A pixel array is provided. The pixel array comprises a plurality of two-dimensionally arranged 4*4 Bayer matrix units, in which the matrix unit comprises a plurality of pixels, any of a green filter, a red filter and a blue filter is disposed in one pixel, and a part of the green filters are replaced by a white color filter in the matrix units. A camera using the same and a color processing method based on the pixel array are also provided.
Abstract:
A method for reading out a high dynamic range image in an image sensor comprises: resetting a pixel array row by row from an initial row of the pixel array to process a first integration treatment for a first image when reaching a first start time; resetting the pixel array row by row from the initial row of the pixel array to process a second integration treatment for the first image when reaching a second start time; and resetting the pixel array row by row from the initial row of the pixel array to process a first integration treatment for a second image when reaching a third start time.
Abstract:
A pixel array is provided. The pixel array comprises a plurality of two-dimensionally arranged 4*4 Bayer matrix units, in which the matrix unit comprises a plurality of pixels, any of a green filter, a red filter and a blue filter is disposed in one pixel, and a part of the green filters are replaced by a white color filter in the matrix units. A camera using the same and a color processing method based on the pixel array are also provided.
Abstract:
The present invention discloses a fixed pattern noise elimination circuit for CMOS image sensor, comprising a static random access memory (SRAM), a shift register, an analog signal processor (ASP), an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) and a comparator. With the present invention, the nonuniformity resulted from the bias mismatch between columns of the CMOS image sensor can be corrected for each frame; therefore, the fixed pattern noise (FPN) in the CMOS image sensor can be eliminated, the imaging quality of the CMOS image sensor can be improved greatly, and the processing circuit for the CMOS image sensor can work in pipeline mode.
Abstract:
A method for reading out a high dynamic range image frame in an image sensor and a device using the same are provided. The image sensor comprises a pixel array with a plurality of pixels arranged in columns and rows. The device comprises a pixel array comprising a plurality of pixels arranged in columns and rows; a calculating unit, configured to calculate and determine a first integration time and a second integration time according to an output image frame information; and an integration time processing unit.
Abstract:
An image signal processing circuit for CMOS image sensor comprises a differential operational amplifier, input stage capacitors, and output stage capacitors. The input stage capacitors comprise a first positive input stage switching capacitor array and a first negative input stage switching capacitor array. The first positive input stage switching capacitor array is configured to input analog image signals, a control end of the first positive input stage switching capacitor array is connected to a color gain control signal end, and an output end of the first positive input stage switching capacitor array is coupled to a positive input end of the differential operational amplifier. The first negative input stage switching capacitor array is configured to input a reference level signal, a control end of the first negative input stage switching capacitor array is connected to the color gain control signal end, and an output end of the first negative input stage switching capacitor array is coupled to a negative input end of the differential operational amplifier. The output stage capacitors are connected between the output end and the input end of the differential operational amplifier. In the present invention, two or more control functions are implemented with a single circuit, therefore, with the imaging effects guaranteed, the circuit structure is simplified, the size of the CMOS image sensor chip is reduced, and thus the cost is reduced. The present invention meets the developing trend of product miniaturization.