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    INSULATION OF MICRO STRUCTURES
    1.
    发明申请
    INSULATION OF MICRO STRUCTURES 审中-公开
    微结构绝缘

    公开(公告)号：WO2013095260A1

    公开(公告)日：2013-06-27

    申请号：PCT/SE2012/051325

    申请日：2012-11-29

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  ERIKSSON, Anders

    IPC: H01L21/762 ,  A61M37/00 ,  B81C1/00 ,  H01L21/768

    CPC classification number: A61B5/685 ,  A61B5/04001 ,  A61M37/0015 ,  A61M2037/0053 ,  G01R1/06744 ,  G01R3/00 ,  H01L21/02 ,  H01L21/0226 ,  H01L21/02334 ,  H01L21/02362 ,  H01L21/308 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The application discloses a method of providing a metal coating on a substrate (10), and electrically insulating sections/parts of the metal coated substrate from each other. A substrate is provided with an insulating material in the substrate, said insulating first material extending through the thickness of the substrate and protruding above one surface of the substrate. It forms an enclosed section/portion (14) of the substrate. A protective structure (15) is provided on the insulating material such that it covers the entire circumference thereof. The insulating material is selectively etched to create an under-etch (18) under said protective structure. Finally conductive material (19) is deposited to provide a metal coating over the substrate, whereby the underetch will provide a disruption in the deposited metal coating, thereby electrically insulating the enclosed section from the surrounding substrate.

    Abstract translation: 本申请公开了一种在基板（10）上提供金属涂层并使金属涂覆的基板的部分/部分彼此电绝缘的方法。 衬底在衬底中设置有绝缘材料，所述绝缘第一材料延伸穿过衬底的厚度并突出在衬底的一个表面上方。 它形成衬底的封闭部分/部分（14）。 在绝缘材料上设置保护结构（15），以覆盖其整个周边。 选择性地蚀刻绝缘材料以在所述保护结构下产生下蚀刻（18）。 最后，沉积导电材料（19）以在衬底上提供金属涂层，由此未曝光将在沉积的金属涂层中提供破坏，从而将封闭部分与周围衬底电绝缘。

    NOVEL BONDING PROCESS AND BONDED STRUCTURES
    2.
    发明申请
    NOVEL BONDING PROCESS AND BONDED STRUCTURES 审中-公开

    公开(公告)号：WO2010126448A3

    公开(公告)日：2010-11-04

    申请号：PCT/SE2010/050479

    申请日：2010-04-30

    Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS, Thorbjörn ,  KÄLVESTEN, Edward ,  SVEDIN, Niklas ,  ERIKSSON, Anders

    Inventor： EBEFORS, Thorbjörn ,  KÄLVESTEN, Edward ,  SVEDIN, Niklas ,  ERIKSSON, Anders

    IPC: H01L23/10 ,  B81B7/00

    Abstract: The invention relates to a sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in said strips is a material bonding said semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. The invention also provides a monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device comprising a first substrate and a second substrate, bonded together with a sealing and bonding structure according to the invention. A method comprises providing a sealing and bonding material structure according to the invention on at least one of two wafers and applying a force and optionally heat to the wafers to join them.

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