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    VIA STRUCTURE AND METHOD THEREOF
    1.
    发明申请
    VIA STRUCTURE AND METHOD THEREOF 审中-公开
    通过其结构和方法

    公开(公告)号：WO2010074649A1

    公开(公告)日：2010-07-01

    申请号：PCT/SE2009/051496

    申请日：2009-12-23

    Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  ÅGREN, Peter ,  SVEDIN, Niklas

    Inventor： EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  ÅGREN, Peter ,  SVEDIN, Niklas

    IPC: H01L23/522 ,  B61B7/00 ,  B81C1/00 ,  H01L21/768 ,  G02B26/08

    CPC classification number: G02B26/0833 ,  B81B7/0006 ,  B81B7/007 ,  B81B2207/092 ,  B81B2207/095 ,  G02B6/3518 ,  G02B6/3584 ,  G02B26/0841 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

    Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.

    Abstract translation: 本发明涉及分层的微电子和/或微机械结构，其包括在导电层之间具有绝缘层的至少三个交替的导电层。 还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供 通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。 它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。 该装置具有根据本发明的分层结构。 还提供了制造这种分层MEMS结构的方法。

    FABRICATION OF INLET AND OUTLET CONNECTIONS FOR MICROFLUIDIC CHIPS
    4.
    发明申请
    FABRICATION OF INLET AND OUTLET CONNECTIONS FOR MICROFLUIDIC CHIPS 审中-公开
    微流控芯片的入口和出口连接的制造

    公开(公告)号：WO2007043963A1

    公开(公告)日：2007-04-19

    申请号：PCT/SE2006/050381

    申请日：2006-10-05

    Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard

    Inventor： KÄLVESTEN, Edvard

    IPC: B81C1/00 ,  B81B1/00

    CPC classification number: B81B7/0061 ,  B81B2201/058

    Abstract: The invention relates to a method of making a fluid communication channel between a micro mechanical structure provided on a front side of a device and the back side of said device. It comprises making the required structural components by lithographic and etching processes on said front side. Holes are then drilled from the back side of said device in precise alignment with the structures on said front side, to provide inlets and/or outlets to and/or from said micromechanical structure.

    Abstract translation: 本发明涉及在设置在设备的前侧的微机械结构与所述设备的背面之间制造流体连通通道的方法。 它包括在所述前侧通过光刻和蚀刻工艺制造所需的结构部件。 然后从所述装置的背面钻出孔，以与所述前侧上的结构精确对准，以向所述微机械结构提供入口和/或出口。

    ELECTRICAL CONNECTIONS IN SUBSTRATES
    6.
    发明申请
    ELECTRICAL CONNECTIONS IN SUBSTRATES 审中-公开
    基板电气连接

    公开(公告)号：WO2004084300A1

    公开(公告)日：2004-09-30

    申请号：PCT/SE2004/000439

    申请日：2004-03-22

    Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  RANGSTEN, Pelle ,  HUHTAOJA, Tommy

    Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  RANGSTEN, Pelle ,  HUHTAOJA, Tommy

    IPC: H01L21/768

    CPC classification number: B81B7/0006 ,  H01L21/76898 ,  H01L23/481 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

    Abstract: The invention relates to a method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate. It comprising creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of said substrate, defined by said trench. It also relates to a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, comprising a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through said substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and comprises the same material as the substrate, i.e. it is made from the wafer material.

    Abstract translation: 本发明涉及一种在导电或半导体衬底的第一（顶部）和第二（底部）表面之间形成电连接的方法。 其包括在第一表面中形成沟槽，并且建立绝缘外壳，其将由所述沟槽限定的所述衬底的一部分完全分离。 它还涉及可用作制造微电子和/或微机械装置的起始衬底的产品，其包括半导体或导电材料的平坦衬底，并且具有第一表面和第二表面，并且至少 一个导电构件延伸穿过所述衬底。 导电构件通过绝缘材料的有限层与平坦基板的周围材料绝缘，并且包括与基板相同的材料，即由晶片材料制成。

    THIN CAPPING FOR MEMS DEVICES
    7.
    发明申请
    THIN CAPPING FOR MEMS DEVICES 审中-公开
    薄膜封装用于MEMS器件

    公开(公告)号：WO2015030657A1

    公开(公告)日：2015-03-05

    申请号：PCT/SE2014/050973

    申请日：2014-08-26

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas

    IPC: B81B7/00 ,  B81C1/00 ,  H01L21/50 ,  H01L23/48

    CPC classification number: B81B7/007 ,  B81B2201/01 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81B2207/095 ,  B81C1/00301 ,  B81C2201/0153 ,  B81C2201/036 ,  B81C2203/0109 ,  B81C2203/0145 ,  H01L21/50 ,  H01L23/08 ,  H01L24/94 ,  H01L2924/16235

    Abstract: The invention relates to a device comprising a base substrate(700) with a micro component (702) attached thereto. Suitably it is provided with routing elements (704) for conducting signals to and from said component (702). It also comprises spacer members (706) which also can act as conducting structures for routing signals vertically. There is a capping structure (708) of a glass material, provided above the base substrate (700), bonded via said spacer members (706), preferably by eutectic bonding, wherein the capping structure (708) comprises vias (710) comprising metal for providing electrical connection through said capping structure. The vias can be made by a stamping/pressing method entailing pressing needles under heating to soften the glass and applying pressure, to a predetermined depth in the glass. However, other methods are possible, e-g- drilling, etching, blasting.

    Abstract translation: 本发明涉及一种包括具有附着到其上的微型部件（702）的基底（700）的装置。 适当地，它设置有用于向所述部件（702）传导信号和从所述部件（702）传导信号的路由元件（704）。 它还包括间隔件（706），其也可以用作垂直路线信号的导电结构。 优选通过共晶接合，通过所述间隔件（706），在基底基板（700）上方设有玻璃材料的封盖结构（708），其中封盖结构（708）包括通孔（710），其包括金属 用于通过所述封盖结构提供电连接。 通孔可以通过冲压/压制方法制成，在加热下需要加压针，使玻璃软化并施加压力至玻璃中预定的深度。 然而，其他方法是可行的，例如钻孔，蚀刻，爆破。

    THROUGH SUBSTRATE VIAS AND DEVICE
    8.
    发明申请
    THROUGH SUBSTRATE VIAS AND DEVICE 审中-公开

    公开(公告)号：WO2014070091A3

    公开(公告)日：2014-05-08

    申请号：PCT/SE2013/051273

    申请日：2013-10-31

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： ERLESAND, Ulf ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn

    IPC: H01L21/768 ,  B81B1/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/48 ,  H01L23/538

    Abstract: The invention relates to a method of making through-substrate-vias in glass substrates. A first substrate (10) is provided on which a plurality of needles (11) protruding vertically from the substrate are made. A second substrate (14) made of glass is then provided. The substrates are located adjacent each other such that the needles on the first substrate face the second substrate. Heat is applied to a temperature where the glass softens, by heating the glass or the needle substrate or both. A force (F) is applied such that the needles on the first substrate penetrate into the glass to provide impressions in the glass. Finally, the first substrate is removed and material filling the impressions in the second substrate made of glass is provided. There is also provided a device, comprising a silicon substrate (100; 200). There is a cavity (102) in which a MEMS component (104) is accommodated, and a cap wafer (300) made of a material having a low dielectric constant, preferably glass. The cap wafer has through substrate vias of metal, and is bonded to the silicon substrate.

    INSULATION OF MICRO STRUCTURES
    9.
    发明申请
    INSULATION OF MICRO STRUCTURES 审中-公开
    微结构绝缘

    公开(公告)号：WO2013095260A1

    公开(公告)日：2013-06-27

    申请号：PCT/SE2012/051325

    申请日：2012-11-29

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  ERIKSSON, Anders

    IPC: H01L21/762 ,  A61M37/00 ,  B81C1/00 ,  H01L21/768

    CPC classification number: A61B5/685 ,  A61B5/04001 ,  A61M37/0015 ,  A61M2037/0053 ,  G01R1/06744 ,  G01R3/00 ,  H01L21/02 ,  H01L21/0226 ,  H01L21/02334 ,  H01L21/02362 ,  H01L21/308 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The application discloses a method of providing a metal coating on a substrate (10), and electrically insulating sections/parts of the metal coated substrate from each other. A substrate is provided with an insulating material in the substrate, said insulating first material extending through the thickness of the substrate and protruding above one surface of the substrate. It forms an enclosed section/portion (14) of the substrate. A protective structure (15) is provided on the insulating material such that it covers the entire circumference thereof. The insulating material is selectively etched to create an under-etch (18) under said protective structure. Finally conductive material (19) is deposited to provide a metal coating over the substrate, whereby the underetch will provide a disruption in the deposited metal coating, thereby electrically insulating the enclosed section from the surrounding substrate.

    Abstract translation: 本申请公开了一种在基板（10）上提供金属涂层并使金属涂覆的基板的部分/部分彼此电绝缘的方法。 衬底在衬底中设置有绝缘材料，所述绝缘第一材料延伸穿过衬底的厚度并突出在衬底的一个表面上方。 它形成衬底的封闭部分/部分（14）。 在绝缘材料上设置保护结构（15），以覆盖其整个周边。 选择性地蚀刻绝缘材料以在所述保护结构下产生下蚀刻（18）。 最后，沉积导电材料（19）以在衬底上提供金属涂层，由此未曝光将在沉积的金属涂层中提供破坏，从而将封闭部分与周围衬底电绝缘。

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