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公开(公告)号：KR860001018B1
公开(公告)日：1986-07-26
申请号：KR810002740
申请日：1981-07-28
Applicant: SONY CORP
Inventor： MASAYUKI KATAKURA , KENZO AKAGIRI
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公开(公告)号：US5285476A
公开(公告)日：1994-02-08
申请号：US85798092
申请日：1992-03-26
Applicant: SONY CORP
Inventor： KENZO AKAGIRI , KYOYA TSUTSUI
IPC: G10L19/002 , G10L19/02 , G10L19/022 , H04B1/66 , H04B14/04
CPC classification number: G10L19/0208 , G10L19/002 , G10L19/0204 , G10L19/022 , H04B1/665
Abstract: A coding apparatus comprising a band division filter (11) for dividing an input digital signal into signal components in a plurality of frequency bands, a block floating circuit (16) for implementing, every block, floating processing of an output signal of the band division filter (11), a plurality of orthogonal transform circuits (13, 14, 15) for orthogonally transforming respective output signals on the time base of the block floating circuit to signals on the frequency base, and an adaptive bit allocation encoder (18) for dividing output signals of the orthogonal transform circuits (13, 14, 15) into signal components in critical bands adaptively to allocate bit numbers thereto on the basis of allowed noise levels of respective critical bands, wherein the length in the time base direction of the blocks is caused to be variable, and the length in the time base direction of the blocks and a floating coefficient used in the floating processing are determined on the basis of the same index.
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公开(公告)号：FR2458124A1
公开(公告)日：1980-12-26
申请号：FR8011964
申请日：1980-05-29
Inventor： AKAGIRI KENZO , KENZO AKAGIRI
Abstract: A.APPAREILLAGE POUR ENREGISTRER UN SIGNAL D'INFORMATION SUR UN SUPPORT D'ENREGISTREMENT AU MOYEN D'UN DISPOSITIF D'ENREGISTREMENT. B.APPAREILLAGE CARACTERISE EN CE QU'IL COMPORTE DES MOYENS DE COMMANDE DE GAIN COMPRENANT DES MOYENS DEFINISSANT UNE PREMIERE VOIE DE TRANSMISSION POUR COMPRIMER LE SIGNAL D'INFORMATION AVEC UNE PREMIERE CARACTERISTIQUE DE GAIN, DES MOYENS DEFINISSANT UNE SECONDE VOIE DE TRANSMISSION POUR COMPRIMER LE SIGNAL D'INFORMATION AVEC UNE SECONDE CARACTERISTIQUE DE GAIN DIFFERENTE DE LA PREMIERE CARACTERISTIQUE DE GAIN, DES MOYENS POUR FOURNIR EFFECTIVEMENT LE SIGNAL D'INFORMATION AU DISPOSITIF D'ENREGISTREMENT PAR L'INTERMEDIAIRE DE LA PREMIERE VOIE DE TRANSMISSION LORSQUE LE NIVEAU DU SIGNAL D'INFORMATION EST INFERIEUR A UNE VALEUR PREDETERMINEE ET POUR FOURNIR EFFECTIVEMENT LE SIGNAL D'INFORMATION AU DISPOSITIF D'ENREGISTREMENT PAR L'INTERMEDIAIRE DE LA SECONDE VOIE DE TRANSMISSION LORSQUE LE NIVEAU DU SIGNAL D'INFORMATION EST SUPERIEUR A CETTE VALEUR DETERMINEE. C.L'INVENTION S'APPLIQUE NOTAMMENT A L'ENREGISTREMENT ET A LA REPRODUCTION DE SIGNAUX AUDIO.
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公开(公告)号：IT1138559B
公开(公告)日：1986-09-17
申请号：IT2375581
申请日：1981-09-02
Applicant: SONY CORP
Inventor： KENZO AKAGIRI , MASAYUKI KATAKURA , MOTOMI OHKOUCHI
Abstract: A noise reduction circuit for use in an audio signal recording/reproducing apparatus includes a first filter circuit for providing frequency emphasis to a signal supplied thereto; a first signal path connected in series with the first filter circuit, and including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and a second filter circuit for providing frequency emphasis to the signal passing through the voltage-controlled amplifier; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a resistor connected to the first signal path for reducing the effect of the frequency emphasis by the second filter circuit when the level of the signal passing through the voltage-controlled amplifier is reduced; and a low pass filter circuit connected with the first signal path for reducing the effect of the frequency emphasis by the first and second filter circuits when the level of the signal passing through the voltage-controlled amplifier is high; wherein the circuit for noise reduction provides a first amount of frequency emphasis for intermediate level signals supplied thereto and a second lower amount of frequency emphasis for low and high level signals supplied thereto. When used in its encoding mode, the first and second filter circuits each include a high-pass filter circuit, and when used in its decoding mode, these filter circuits each include a low-pass filter circuit.
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公开(公告)号：IT1140300B
公开(公告)日：1986-09-24
申请号：IT2530381
申请日：1981-11-26
Applicant: SONY CORP
Inventor： MASAYUKI KATAKURA , KENZO AKAGIRI , MOTOMI OOKOUCHI
Abstract: A level detecting circuit for producing a level detected output signal in response to an input signal includes a logarithmic converting amplifier which logarithmically converts the input signal into a logarithmically converted signal; a differential error amplifier which produces a logarithmically amplified signal in response to the logarithmically converted signal and at least one feedback signal; an integrating capacitor supplied with the logarithmically amplified signal through a PN junction for producing an integrated signal; a voltage dividing circuit for voltage dividing the integrated signal and the logarithmically amplified signal in accordance with a selected ratio and supplying at least one resultant voltage divided signal as the at least one feedback signal to the differential error amplifier; and an output PN junction for producing the level detected output signal in response to the integrated signal.
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Patent Agency Ranking
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7.发明专利
公开(公告)号：AU3195393A
公开(公告)日：1993-08-05
申请号：AU3195393
申请日：1993-01-21
Applicant: SONY CORP
Inventor： KYOYA TSUTSUI , KENZO AKAGIRI
Abstract: Apparatus for compressing a digital input signal, to provide a compressed digital output signal, comprises means (11-15) for deriving plural spectral coefficients from the digital input signal, and for grouping the spectral coefficients into bands, and adaptive bit allocation means (16-18) for adaptively allocating a number of signal-dependent quantizing bits among the bands to allocate to each band a number of signal-dependent quantizing bits for quantizing each spectral coefficient in the band, the number of signal-dependent quantizing bits allocated to each band being determined according to the band magnitude, weighted depending on the band frequency.
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公开(公告)号：RU2090973C1
公开(公告)日：1997-09-20
申请号：RU92016428
申请日：1992-02-28
Applicant: SONY CORP
Inventor： KENZO AKAGIRI
Abstract: An apparatus for highly efficiently encoding digital signals by converting input digital signals into signals on a frequency axis in a blocked form, and encoding the input digital signals with a suitable number of assignment bits for each of said blocks to transmit them, wherein the input digital signals are subjected to the orthogonal conversion and are divided by a critical band, encoded with a suitable number of assignment bits based on an allowable noise level, and are subjected to the floating processing. When the floating processing is to be carried out by a plurality of small blocks of a band narrower than the critical band, information of word length of a small block is transmitted out of the small blocks in the critical bands, in order to reduce the bit number for the word length and to compress the bits. Moreover, when the floating processing is to be carried out by small blocks of bands narrower than the critical bands, allowable noise level and information of word length of a small block are transmitted for each of the critical bands instead of transmitting the floating coefficient for each of the critical bands, in order to decrease the number of transmission bits and to highly compress the bits. When the floating processing is to be carried out by small blocks of bands narrower than the critical bands, furthermore, information of a word length corresponding to the number of assignment bits is transmitted, and information related to allowable noise level whose designated range is deviated toward the lower side from the signal level range within the critical band by a predetermined amount of level, is obtained through a quantization table and is transmitted instead of transmitting the floating coefficient, in order to more highly compress the bits.
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公开(公告)号：IT1138883B
公开(公告)日：1986-09-17
申请号：IT2317281
申请日：1981-07-27
Applicant: SONY CORP
Inventor： MASAYUKI KATAKURA , KENZO AKAGIRI
Abstract: A gain control circuit particularly suitable for compressing or expanding the dynamic range of an audio signal, and thereby reducing noise produced during recording and playback comprises an input circuit receiving an input signal, first and second differential amplifiers each supplied from the input circuit with a signal derived from the input signal, with the amplifying elements of each being complementary to the amplifying elements of the other, a first pair of transistors having their emitters coupled to the output of the first differential amplifier and a second pair of transistors having their emitters coupled to the output of the second differential amplifier. The transistors of each pair are of the same conductivity type as the amplifying elements of the associated differential amplifier. The collectors of the transistors of each pair are jointed respectively to the collectors of the corresponding transistors of the other pair. Control voltage input terminals are respectively connected to one transistor of each pair and an opposite transistor of the other pair. A feedback signal is applied from the joined collectors of the one transistors to the input circuit, and an output current is applied from the joined collectors of the other transistors to an output stage which can include a load resistor or a current-to-voltage converter circuit. This arrangement prevents variation in total static current when gain is varied, thereby achieving a superior signal-to-noise characteristic.
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