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公开(公告)号：EP1460847A4
公开(公告)日：2008-10-01
申请号：EP02790758
申请日：2002-12-13
Applicant: SONY CORP
Inventor： AOYAMA KOJI , NISHIBORI KAZUHIKO , KONDO MAKOTO , HOSHINO TAKAYA
CPC classification number: H04N7/0132 , H04N7/0115 , H04N7/014 , Y10S348/91
Abstract: An image signal processing apparatus and processing method for performing double-speed conversion of an image which has been subjected to telecine conversion. A first field is identified according to an image signal level difference value calculated for each detection pixel. In a field following the first field, a write-in pixel position shifted in the vector direction of the motion vector from the detection pixel is calculated. The calculated write-in pixel position is correlated to the motion vector and stored. Interpolation pixel data is calculated from the pixel data read out from the first field according to the stored write-in pixel position and the motion vector. The interpolation pixel data obtained is written into the write-in pixel position.
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公开(公告)号：EP0751679A3
公开(公告)日：1998-07-08
申请号：EP96304644
申请日：1996-06-24
Applicant: SONY CORP
Inventor： HAMAMATSU TOSHIHIKO , SUEMATSU MASAYUKI , KONDO MAKOTO
CPC classification number: H04N5/2624 , H04N5/45
Abstract: An image displaying apparatus comprises a line memory from which each line period segment of a first video signal is read during a half line period to produce a first half line period video signal segment, first and second field memories, from each of which each of line period segments contained in each odd or even field period portion of a second video signal is read during a half line period to produce a second or third half line period video signal segment, a signal selector operative to extract alternately the first and second half line period video signal segments to form a first field period video signal portion or extract alternately the first and third half line period video signal segments to form a second field period video signal portion, a dual image display portion for displaying double window picture images in response to the first and second field period video signal portions, an overtaking detector for detecting an overtaking reading condition possibly caused in the first and second field memories, and a writing and reading controller operative to control a timing for writing and reading of the field period portions in the first field memory and a timing for writing and reading of the field period portions in the second field memory so as to suppress defects of display resulting from the overtaking reading and appearing on the double window picture images displayed on the dual image display portion when the overtaking reading condition is detected by the overtaking detector.
Abstract translation: 一种图像显示设备包括行存储器，在半行时间段期间从其读取第一视频信号的每个行周期段以产生第一半行周期视频信号段，第一和第二场存储器，每行第一和第二场存储器 在半行周期期间读取包含在第二视频信号的每个奇数或偶数场周期部分中的周期段以产生第二或第三半行周期视频信号段;信号选择器，用于交替地提取第一和第二半行周期 视频信号段以形成第一场周期视频信号部分或交替地提取第一和第三半行周期视频信号段以形成第二场周期视频信号部分;双图像显示部分，用于响应 第一和第二场周期视频信号部分，一个超车检测器，用于检测在冷杉中可能引起的超车读取条件 第一场存储器和第二场存储器，以及写入和读取控制器，用于控制第一场存储器中的场周期部分的写入和读取的定时以及第二场存储器中的场周期部分的写入和读取的定时，以便 当超车检测器检测到超车读取条件时，抑制由超车读出引起的显示缺陷并出现在显示在双重图像显示部分上的双窗口图像上。
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公开(公告)号：EP1460846A4
公开(公告)日：2009-12-09
申请号：EP02790757
申请日：2002-12-13
Applicant: SONY CORP
Inventor： AOYAMA KOJI , KONDO MAKOTO , NISHIBORI KAZUHIKO
CPC classification number: H04N7/0132 , H04N7/0112 , H04N7/014
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4.发明公开Interpolation method and apparatus for improving registration adjustment in a projection television system. 失效用于改善电视投影系统配准调整的内插方法和装置。
公开(公告)号：EP0626794A3
公开(公告)日：1998-04-22
申请号：EP94303684
申请日：1994-05-23
Applicant: SONY CORP
Inventor： SUEMATSU MASAYUKI , HAMAMATSU TOSHIHIKO , KONDO MAKOTO
CPC classification number: H04N9/28 , H04N3/2335
Abstract: The nonlinear, deflection waveform used improve registration in a three picture tube projection television system is produced using interpolation of stored data setting points by first performing a reduced number of high-order interpolation calculations using the setting points and then performing low-order interpolation calculations either between two calculated high-order interpolated data points or between one of the calculated high-order interpolated data points and one of the setting points. This results in reducing the work load on the central processing unit in the registration system. In addition, a reduced bit-size requirement for the interpolation portion of the registration is obtained by storing registration data of a first bit size and then adding bits below the original LSB for the interpolation calculation prior to performing the digital to analog conversion.
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公开(公告)号：EP0919985A4
公开(公告)日：2005-06-15
申请号：EP98919540
申请日：1998-05-11
Applicant: SONY CORP
Inventor： MIYAZAKI SHINICHIRO , KONDO MAKOTO
CPC classification number: G09G5/391 , G09G3/2092 , G09G5/006 , G09G5/008 , G09G2360/18 , H04N5/126 , H04N7/0105
Abstract: An A/D converter (6) digitizes input video signals by using a clock pulse (53) from a VCO (4) of a PLL circuit (1). The frequency of the pulse (53) is fixed. After a pre-processing circuit (7) changes the number of scanning lines, the digital video signals are written in a field memory (10). From the momory (10), the video signals are read out by using a second clock pulse (63) generated from a PLL circuit (11). The frequency dividing ratio of a frequency divider (15) of the PLL circuit (11) is changed by means of a control signal. When the frequency dividing ratio is changed, the frequency of the clock pulse (63) is changed and the number of samples in 1H-section of the video signals read out from the memory (10) is changed. Since the number of the pixels in an effective video section of the written video signals is fixed, the ratio of the range of the 1H-section to that of the effective video section can be changed and, accordingly, horizontal size adjustment can be performed by changing the number of samples in the 1H-section on the reading-out side.
Abstract translation: A / D转换器（6）通过使用来自PLL电路（1）的VCO（4）的时钟脉冲（53）将输入视频信号数字化。 脉冲（53）的频率是固定的。 在预处理电路（7）改变扫描线的数量之后，将数字视频信号写入场存储器（10）中。 从存储器（10）中，通过使用从PLL电路（11）产生的第二时钟脉冲（63）读出视频信号。 通过控制信号改变PLL电路（11）的分频器（15）的分频比。 当改变分频比时，改变时钟脉冲（63）的频率并改变从存储器（10）读出的视频信号1H段的采样数。 由于写入的视频信号的有效视频部分中的像素数量是固定的，因此可以改变1H部分的范围与有效视频部分的范围的比率，因此，水平大小调整可以通过 改变读出侧1H段的样本数量。
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Patent Agency Ranking
公开(公告)号：DE69634676T2
公开(公告)日：2006-01-19
申请号：DE69634676
申请日：1996-06-24
Applicant: SONY CORP
Inventor： HAMAMATSU TOSHIHIKO , SUEMATSU MASAYUKI , KONDO MAKOTO
Abstract: An image displaying apparatus comprises a line memory from which each line period segment of a first video signal is read during a half line period to produce a first half line period video signal segment, first and second field memories, from each of which each of line period segments contained in each odd or even field period portion of a second video signal is read during a half line period to produce a second or third half line period video signal segment, a signal selector operative to extract alternately the first and second half line period video signal segments to form a first field period video signal portion or extract alternately the first and third half line period video signal segments to form a second field period video signal portion, a dual image display portion for displaying double window picture images in response to the first and second field period video signal portions, an overtaking detector for detecting an overtaking reading condition possibly caused in the first and second field memories, and a writing and reading controller operative to control a timing for writing and reading of the field period portions in the first field memory and a timing for writing and reading of the field period portions in the second field memory so as to suppress defects of display resulting from the overtaking reading and appearing on the double window picture images displayed on the dual image display portion when the overtaking reading condition is detected by the overtaking detector.
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公开(公告)号：DE60208292D1
公开(公告)日：2006-02-02
申请号：DE60208292
申请日：2002-10-08
Applicant: SONY CORP
Inventor： HOSHINO TAKAYA , SARUGAKU TOSHIO , SOMEYA IKUO , KONDO MAKOTO , UEKI NOBUO , KUROKAWA MASUYOSHI , NISHIBORI KAZUHIKO , AOYAMA KOJI , MOGI YUKIHIKO
Abstract: An image signal processing apparatus receives an image signal which has been generated by subjecting a telecine-converted image to double speed conversion. The image signal processing apparatus is operable to process the telecine-converted image signal by forming one film frame from four fields, a first field on the basis of a difference value calculated between pixel signal levels, and shifting the position of a detected pixel in a vector direction of a motion vector such that an amount of shift is progressively increased in accordance with a transition made from the identified first field to the subsequent fields.
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公开(公告)号：PL180758B1
公开(公告)日：2001-04-30
申请号：PL31502296
申请日：1996-06-28
Applicant: SONY CORP
Inventor： HAMAMATSU TOSHIHIKO , SUEMATSU MASAYUKI , KONDO MAKOTO
Abstract: An image displaying apparatus comprises a line memory from which each line period segment of a first video signal is read during a half line period to produce a first half line period video signal segment, first and second field memories, from each of which each of line period segments contained in each odd or even field period portion of a second video signal is read during a half line period to produce a second or third half line period video signal segment, a signal selector operative to extract alternately the first and second half line period video signal segments to form a first field period video signal portion or extract alternately the first and third half line period video signal segments to form a second field period video signal portion, a dual image display portion for displaying double window picture images in response to the first and second field period video signal portions, an overtaking detector for detecting an overtaking reading condition possibly caused in the first and second field memories, and a writing and reading controller operative to control a timing for writing and reading of the field period portions in the first field memory and a timing for writing and reading of the field period portions in the second field memory so as to suppress defects of display resulting from the overtaking reading and appearing on the double window picture images displayed on the dual image display portion when the overtaking reading condition is detected by the overtaking detector.
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公开(公告)号：EP1460845A4
公开(公告)日：2009-10-28
申请号：EP02786103
申请日：2002-12-13
Applicant: SONY CORP
Inventor： HOSHINO TAKAYA , SARUGAKU TOSHIO , SOMEYA IKUO , KONDO MAKOTO , NISHIBORI KAZUHIKO , AOYAMA KOJI , MOGI YUKIHIKO , UEKI NOBUO , KUROKAWA MASUYOSHI
CPC classification number: H04N7/0132 , H04N5/145 , H04N7/014 , Y10S348/91
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公开(公告)号：DE69432945D1
公开(公告)日：2003-08-21
申请号：DE69432945
申请日：1994-05-23
Applicant: SONY CORP
Inventor： SUEMATSU MASAYUKI , HAMAMATSU TOSHIHIKO , KONDO MAKOTO
Abstract: The nonlinear, deflection waveform used improve registration in a three picture tube projection television system is produced using interpolation of stored data setting points by first performing a reduced number of high-order interpolation calculations using the setting points and then performing low-order interpolation calculations either between two calculated high-order interpolated data points or between one of the calculated high-order interpolated data points and one of the setting points. This results in reducing the work load on the central processing unit in the registration system. In addition, a reduced bit-size requirement for the interpolation portion of the registration is obtained by storing registration data of a first bit size and then adding bits below the original LSB for the interpolation calculation prior to performing the digital to analog conversion.
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