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    1.
    发明专利
    未知

    公开(公告)号：DE69427311T2

    公开(公告)日：2001-11-22

    申请号：DE69427311

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    3.
    发明专利
    未知

    公开(公告)号：DE69427378T2

    公开(公告)日：2002-04-25

    申请号：DE69427378

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    4.
    发明专利
    未知

    公开(公告)号：DE69420981D1

    公开(公告)日：1999-11-11

    申请号：DE69420981

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    7.
    发明专利
    未知

    公开(公告)号：DE69427378D1

    公开(公告)日：2001-07-05

    申请号：DE69427378

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    8.
    发明专利
    未知

    公开(公告)号：DE69427311D1

    公开(公告)日：2001-06-28

    申请号：DE69427311

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    9.
    发明专利
    未知

    公开(公告)号：DE69420981T2

    公开(公告)日：2000-04-06

    申请号：DE69420981

    申请日：1994-01-07

    Applicant: SONY CORP

    Inventor： MAEKAWA ITARU ,  OHGIHARA TAKAHIRO ,  TANAKA KUNINOBU

    IPC: H03D7/12 ,  H03F1/30 ,  H03F3/193 ,  H03F3/21

    Abstract: The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).

    Radio communication device, method of responding to host apparatus and program
    10.
    发明专利
    Radio communication device, method of responding to host apparatus and program 审中-公开
    无线电通信设备，对主机和程序的响应方法

    公开(公告)号：JP2011096090A

    公开(公告)日：2011-05-12

    申请号：JP2009250805

    申请日：2009-10-30

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： TANAKA MINORU ,  MAEKAWA ITARU ,  YOSHIDA HIDEMASA

    IPC: G06F13/12 ,  H04B1/3822 ,  H04B1/40

    CPC classification number: H04L65/1053 ,  H04W88/02

    Abstract: PROBLEM TO BE SOLVED: To enable a host apparatus to treat a state of radio connection with another device via a radio communication interface as a state of an external storage device.
    SOLUTION: A radio communication device includes: a host connection interface which is connected to a host apparatus and receives commands input from the host apparatus; a radio communication interface which performs radio communication with another radio communication device; and a control unit which controls operation of the host connection interface and the radio communication interface. The control unit controls the host connection interface to output device information indicating that the device is a peripheral device for accessing a storage medium to the host apparatus, in response to a command indicating inquiry about information regarding the device.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：使得主机设备能够经由无线通信接口将与另一设备的无线电连接的状态视为外部存储设备的状态。 解决方案：无线电通信设备包括：主机连接接口，其连接到主机设备并接收从主机设备输入的命令; 无线通信接口，与另一无线通信装置进行无线通信; 以及控制单元，其控制主机连接接口和无线通信接口的操作。 响应于指示关于有关设备的信息的查询的命令，控制单元控制主机连接接口输出指示设备是用于访问到主机设备的存储介质的外围设备的设备信息。 版权所有（C）2011，JPO＆INPIT

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