DATA ENCODING METHOD AND DATA DECODING METHOD
    1.
    发明公开
    DATA ENCODING METHOD AND DATA DECODING METHOD 失效
    DATENKODIER-和数据解码

    公开(公告)号:EP0744838A4

    公开(公告)日:1999-05-06

    申请号:EP95939420

    申请日:1995-12-12

    Applicant: SONY CORP

    CPC classification number: G11B20/1426 G06T9/005 H03M5/145

    Abstract: A data encoding method by which a data word train constituted in units of (m x i) bits is converted into a code word train in units of (n x i) bits. In the method, a shift register (1) receives a data word train in units of (m x i) bits and an encoder (2) discrimates the constraint length indicating the length of the data word to be converted at present and, at the same time, discriminates which of the m bits is corresponding to the first bit of the data word to be converted at present. A selector (3) selects one conversion table out of a plurality of conversion tables which satisfy at least the minimum run length (d) and constitute variable-length tables in accordance with the constraint length and position of the first bit of the data word. Therefore, the product of the minimum inverting clearance and a detected window width can be made larger and, for example, data can be recorded on an information recording medium at a high density by generating the code word corresponding to the data word to be converted at present in accordance with the selected conversion table.

    6.
    发明专利
    未知

    公开(公告)号:DE69329401T2

    公开(公告)日:2001-03-29

    申请号:DE69329401

    申请日:1993-02-24

    Applicant: SONY CORP

    Abstract: The maximum likelihood decoder (28) comprises the Viterbi decoding unit (30) and the symbol concluding unit (29). Final N-M bit data of data of N (> M) bit unit, to which M-bit original data is converted, is supplied to the symbol concluding unit (29) as a terminal portion and other data is supplied to the Viterbi decoding unit (30), thereby being demodulated by a demodulator (37). There can be obtained a maximum likelihood decoding apparatus in which data that must be processed at high speed, such as image data or the like can be recorded and reproduced at high speed and the maximum likelihood decoding can be constructed as the completion type to effect the parallel decoding and a reproducing data demodulating apparatus using such maximum likelihood decoding apparatus.

    7.
    发明专利
    未知

    公开(公告)号:TR199902381T1

    公开(公告)日:2000-07-21

    申请号:TR9902381

    申请日:1998-12-07

    Abstract: An encoder for encoding a stream of data bits of a binary source signal into a stream of data bits of a binary channel signal, the bitstream of the source signal being divided into smaller n-bit source words (x1, x2) which are converted by a logic circuit converter in the encoder into corresponding m-bit channel words, (y1, y2, y3). The conversion of each n-bit source word is parity preserving (see Table I and FIG. 1). The relations hold that m>n>=1, p>=1, and p can vary. Preferably, m=n+1. In order to comply with (d, k) runlength requirements, certain blocks of 2-bit source words are encoded into particular blocks of 3-bit channel words. A decoder is also disclosed for decoding a channel signal produced by the encoder.

    8.
    发明专利
    未知

    公开(公告)号:BR9807593A

    公开(公告)日:2000-02-22

    申请号:BR9807593

    申请日:1998-12-07

    Abstract: An encoder for encoding a stream of data bits of a binary source signal into a stream of data bits of a binary channel signal, the bitstream of the source signal being divided into smaller n-bit source words (x1, x2) which are converted by a logic circuit converter in the encoder into corresponding m-bit channel words, (y1, y2, y3). The conversion of each n-bit source word is parity preserving (see Table I and FIG. 1). The relations hold that m>n>=1, p>=1, and p can vary. Preferably, m=n+1. In order to comply with (d, k) runlength requirements, certain blocks of 2-bit source words are encoded into particular blocks of 3-bit channel words. A decoder is also disclosed for decoding a channel signal produced by the encoder.

    10.
    发明专利
    未知

    公开(公告)号:AT189568T

    公开(公告)日:2000-02-15

    申请号:AT93103877

    申请日:1993-03-10

    Applicant: SONY CORP

    Abstract: A modulating method and apparatus and a demodulating method and apparatus in which a variable length code (d, k;m, n;r) which can provide a greater minimum reversal distance to allow recording of a higher density than ever is provided. According to the modulating method and apparatus, digital data of a basic data length of m bits is modulated into a variable length code (d, k;m, n;r) of a basic code length of n bits, and where the distance between adjacent ones of the digital data is represented by T, the minimum reversal distance (Tmin) of the variable length code is equal to or greater than 2.0T and the minimum length of a run of a same symbol is equal to or greater than 4. The demodulating apparatus demodulates the digital data back into the variable length code and comprises storage means (23) for storing therein a plurality of tables for converting the digital data into the variable length code, discriminating means (21) for discriminating the binding length of the digital data, and selecting means (22) for selecting one of the tables in accordance with a result of discrimination of the discriminating means(21).

Patent Agency Ranking