公开(公告)号：JP2005348581A

公开(公告)日：2005-12-15

申请号：JP2004168678

申请日：2004-06-07

Applicant: Sony Corp ,  ソニー株式会社

Inventor： OGA GENICHIRO ,  SEGAMI MASAHIRO ,  KATAKURA MASAYUKI ,  SHINPO YOSHIMASA

IPC: H02M1/08

Abstract: PROBLEM TO BE SOLVED: To provide a load driving circuit which reduces electric power consumption in a steady state, while heightening momentary current drive capability.
SOLUTION: In a current amplification circuit 3A, a current flowing through a base of an npn transistor Q1 from a node N1 is amplified, and in a current amplifying circuit 2B, a current flowing through a base of a pnp transistor Q2 from a node N2 is amplified. With such a constitution, when it is compared with a case where these current amplifying circuits are not included, the amplitude of a signal component Δi, required to output a predetermined maximum current to a load from an output terminal Tout, is decreased, and idling current Iid2 is reduced. A bias voltage, generated at bias circuits (Q13, Q14) connected between the node N1 and the node N2, becomes low, and idling current Iid1 of the output stage transistors (Q1, Q2) is reduced by making the idling current Iid2 small.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种在稳定状态下降低电力消耗的负载驱动电路，同时提高瞬时电流驱动能力。 解决方案：在电流放大电路3A中，流过来自节点N1的npn晶体管Q1的基极的电流被放大，并且在电流放大电路2B中，流过pnp晶体管Q2的基极的电流从 节点N2被放大。 通过这样的结构，当与不包含这些电流放大电路的情况进行比较时，从输出端子Tout向负载输出规定的最大电流所需的信号成分Δi的振幅减小，空转 电流Iid2减小。 连接在节点N1和节点N2之间的偏置电路（Q13，Q14）产生的偏置电压变低，输出级晶体管（Q1，Q2）的空载电流Iid1通过使空载电流Iid2小而减小。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2006345405A

公开(公告)日：2006-12-21

申请号：JP2005171142

申请日：2005-06-10

Applicant: SONY CORP

Inventor： OKAWA TAKASHI ,  SEGAMI MASAHIRO ,  SHINPO YOSHIMASA

IPC: H03K5/04 ,  H03K5/12 ,  H03M1/34

Abstract: PROBLEM TO BE SOLVED: To change the duty ratio of an output pulse by variably changing the slew rate of an input signal. SOLUTION: A duty-ratio variable circuit includes a first inverter 21 which variably changes the slew rate of the input signal according to a control signal, a second inverter 22 which reverses a pulse signal outputted from the first inverter, an integrator which averages the level of the pulse signal from the second inverter, and an amplifier 26 which compares an output signal from the integrator with a reference value and outputs a control signal according to a comparison result. The circuit variably changes the slew rate according to the control signal and the duty ratio of a pulse waveform outputted from the second inverter. COPYRIGHT: (C)2007,JPO&INPIT