公开(公告)号：DE112018000450T5

公开(公告)日：2019-10-10

申请号：DE112018000450

申请日：2018-01-10

Applicant: SONY CORP

Inventor： KABASAWA HIDETOSHI ,  YAMASHITA KOSEI ,  MURAKOSHI SHO ,  MATSUMOTO TOMOHIRO ,  SEGAMI MASAHIRO

IPC: G01P15/09 ,  B60G17/015 ,  B60G17/016 ,  B60W40/107 ,  B60W40/109 ,  B60W40/11 ,  B60W40/112 ,  G01P15/18

Abstract: Eine Fahrzeugsteuervorrichtung gemäß einem Modus der Ausführungsform der vorliegenden Technologie ist mit einer Steuereinheit ausgestattet. Die Steuereinheit erzeugt ein Steuersignal zum Steuern des Verhaltens eines Fahrzeugaufbaus auf der Basis eines ersten Beschleunigungs-Detektionssignals, das Informationen enthält, die sich auf eine auf den Fahrzeugaufbau wirkende Beschleunigung beziehen, und das eine der Beschleunigung entsprechende Wechselstrom-Wellenform aufweist, und eines zweiten Beschleunigungs-Detektionssignals, das auf die Beschleunigung bezogene Informationen enthält, und das eine Ausgangswellenform aufweist, in der eine der Beschleunigung entsprechende Wechselstromkomponente auf eine Gleichstromkomponente überlagert wird.

公开(公告)号：DE112017006862T5

公开(公告)日：2019-10-24

申请号：DE112017006862

申请日：2017-11-14

Applicant: SONY CORP

Inventor： MURAKOSHI SHO ,  KABASAWA HIDETOSHI ,  MATSUMOTO TOMOHIRO ,  SEGAMI MASAHIRO ,  YAMASHITA KOSEI

IPC: G03B17/56 ,  B64C39/02 ,  B64D47/08 ,  G01C9/08 ,  G03B15/00 ,  H04N5/222 ,  H04N5/232

Abstract: [Problem] Bereitstellung einer Technik, mit der die Ausrichtung eines gehaltenen Gegenstands genau gesteuert werden kann.[Lösung] Diese Ausrichtungssteuerungsvorrichtung ist mit einer Steuereinheit ausgestattet. Die Steuereinheit steuert die Ausrichtung eines zu haltenden Gegenstands durch Steuern der Ausrichtung einer Haltevorrichtung zum Halten des zu haltenden Gegenstands auf der Basis der Gravitationsrichtung, und bestimmt die Gravitationsrichtung auf der Haltevorrichtung auf der Basis einer statischen Beschleunigungskomponente, die auf der Basis eines ersten Beschleunigungsdetektionssignals berechnet wird, das durch Detektieren einer auf die Haltevorrichtung wirkenden dynamischen Beschleunigungskomponente erhalten wird, und eines zweiten Beschleunigungsdetektionssignals, das durch Detektieren der auf die Haltevorrichtung wirkenden statischen Beschleunigungskomponente und dynamischen Beschleunigungskomponente erhaltenen wird.

公开(公告)号：EP1865714A4

公开(公告)日：2010-12-15

申请号：EP06714748

申请日：2006-02-27

Applicant: SONY CORP

Inventor： KINUGASA YUKIHISA ,  SEGAMI MASAHIRO ,  HIROTA ISAO

IPC: H01L21/339 ,  H01L27/148 ,  H01L29/762 ,  H04N5/335 ,  H04N5/372 ,  H04N5/376

CPC classification number: H04N5/3728 ,  G09G2330/021 ,  G09G2330/024 ,  H04N5/372 ,  H04N5/37206 ,  H04N5/376 ,  H04N5/3765

公开(公告)号：JP2006345405A

公开(公告)日：2006-12-21

申请号：JP2005171142

申请日：2005-06-10

Applicant: SONY CORP

Inventor： OKAWA TAKASHI ,  SEGAMI MASAHIRO ,  SHINPO YOSHIMASA

IPC: H03K5/04 ,  H03K5/12 ,  H03M1/34

Abstract: PROBLEM TO BE SOLVED: To change the duty ratio of an output pulse by variably changing the slew rate of an input signal. SOLUTION: A duty-ratio variable circuit includes a first inverter 21 which variably changes the slew rate of the input signal according to a control signal, a second inverter 22 which reverses a pulse signal outputted from the first inverter, an integrator which averages the level of the pulse signal from the second inverter, and an amplifier 26 which compares an output signal from the integrator with a reference value and outputs a control signal according to a comparison result. The circuit variably changes the slew rate according to the control signal and the duty ratio of a pulse waveform outputted from the second inverter. COPYRIGHT: (C)2007,JPO&INPIT

公开(公告)号：JP2007295378A

公开(公告)日：2007-11-08

申请号：JP2006122234

申请日：2006-04-26

Applicant: Sony Corp ,  ソニー株式会社

Inventor： ONO KOICHI ,  SEGAMI MASAHIRO

IPC: H03M1/14

Abstract: PROBLEM TO BE SOLVED: To provide an A-D conversion circuit in a pipeline system capable of suppressing the deterioration of monotonicity caused by errors of an amplification gain at each conversion step.
SOLUTION: An input analog signal A1 from a previous step and a delayed analog signal A2 generated by delaying the input analog signal A1 at a sample holder 11 are converted into digital signals (DU, DL) at an A-D converter 12. The digital signals (DU, DL) are converted into analog signals (AU, AL) at a D-A converter 13. Further, a difference between the analog signals (AU, AL) and the delayed analog signal A2 is amplified at residual difference amplifiers 14, 15, and the amplification result (residual signal) is supplied to a conversion block at a next step. In the A-D converter 12, a high-order digital code DU is determined according to the input analog signal A1, and a low-order digital code DL is determined according to the high-order digital code DU and the delayed analog signal A2.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够抑制由每个转换步骤的放大增益的误差引起的单调性劣化的管线系统中的A-D转换电路。 解决方案：通过将样品保持器11上的输入模拟信号A1延迟而产生的来自前一步骤的输入模拟信号A1和延迟的模拟信号A2在AD转换器12处被转换成数字信号（DU，DL）。 数字信号（DU，DL）在DA转换器13处转换成模拟信号（AU，AL）。此外，模拟信号（AU，AL）和延迟的模拟信号A2之间的差被放大在剩余差分放大器14， 15，并且在下一步骤中将放大结果（残留信号）提供给转换块。 在A-D转换器12中，根据输入的模拟信号A1确定高阶数字码DU，并且根据高阶数字码DU和延迟的模拟信号A2确定低位数字码DL。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007221368A

公开(公告)日：2007-08-30

申请号：JP2006038448

申请日：2006-02-15

Applicant: Sony Corp ,  ソニー株式会社

Inventor： SEGAMI MASAHIRO ,  NAKAYAMA KENJI ,  HIROTA ISAO

IPC: H03K17/695 ,  H03K17/14 ,  H04N5/335 ,  H04N5/341 ,  H04N5/357 ,  H04N5/369 ,  H04N5/3722 ,  H04N5/376

Abstract: PROBLEM TO BE SOLVED: To make it possible to drive in a proper phase delay amount or gradient property without effect of variation or environmental change when driving a capacitive reactance load by a low speed transient pulse. SOLUTION: A phase delay control unit 672 supervises a delay amount for an input pulse Pin of load voltage, supplies a delay amount control signal P72 to a delay clock number register 614, and controls a delay amount of a pulse delay unit 612 so that the delay amount agrees with specifications. A slew rate control unit 674 supervises a slew rate of load voltage, supplies a slew rate control signal P74 to a DAC (digital analog converter) data register 638, and controls a pre-stage drive signal P30 output from a DA converter 634 so that the slew rate agrees with the specifications. Constant transition property can be obtained at all times even if there are variation and environment change, since load voltage in an actual operation is supervised, and feedback control is executed so that the transition property agrees with the specifications. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：通过低速瞬态脉冲驱动电容性电抗负载时，可以在适当的相位延迟量或梯度特性下驱动而不影响变化或环境变化。 解决方案：相位延迟控制单元672监视负载电压的输入脉冲Pin的延迟量，将延迟量控制信号P72提供给延迟时钟数寄存器614，并且控制脉冲延迟单元612的延迟量 因此延迟量与规格一致。 转换速率控制单元674监视负载电压的转换速率，将转换速率控制信号P74提供给DAC（数字模拟转换器）数据寄存器638，并且控制从DA转换器634输出的前级驱动信号P30，使得 压摆率与规格一致。 即使存在变化和环境变化，也可以随时获得恒定的过渡特性，因为实际操作中的负载电压被监控，并且执行反馈控制使得过渡特性与规格一致。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2006311483A

公开(公告)日：2006-11-09

申请号：JP2005294398

申请日：2005-10-07

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KINUGASA YUKIHISA ,  SEGAMI MASAHIRO ,  HIROTA ISAO

IPC: H01L21/339 ,  H01L27/148 ,  H01L29/762 ,  H04N5/335 ,  H04N5/372 ,  H04N5/376

CPC classification number: H04N5/3728 ,  G09G2330/021 ,  G09G2330/024 ,  H04N5/372 ,  H04N5/37206 ,  H04N5/376 ,  H04N5/3765

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption in a drive device for driving a capacitive element such as a charge coupled device.
SOLUTION: A driver circuit is connected so as to configure a triphase LC resonance circuit among three element electrodes. Three nodes Node-A, Node-B, Node-C of the triphase LC resonance circuit are driven by any one of logic level 0, high impedance Z and 1 so that LC resonance circuits constituting the triphase LC resonance circuit resonate while sequentially shifting phases. By driving each of the phases to keep a phase difference of 2π/3, an output logic takes any one of 0, high impedance and 1 and phases and logics are allocated so as not to overlap with each other in any timing at any point of time.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为了降低用于驱动诸如电荷耦合器件的电容元件的驱动装置中的功耗。

解决方案：连接驱动电路，以便在三个元件电极之间配置三相LC谐振电路。 三相LC谐振电路的三个节点A，节点B，节点C由逻辑电平0，高阻抗Z和1中的任何一个驱动，使得构成三相LC谐振电路的LC谐振电路在顺序移相 。 通过驱动每个相位以保持2π/ 3的相位差，输出逻辑采用0，高阻抗和1中的任何一个，并且分配相位和逻辑，使得在任何时间点的任何时刻不分配彼此重叠 时间。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2006115003A

公开(公告)日：2006-04-27

申请号：JP2004297963

申请日：2004-10-12

Applicant: Sony Corp ,  ソニー株式会社

Inventor： ONO KOICHI ,  SEGAMI MASAHIRO

IPC: H03M1/12 ,  H03F3/70 ,  H03M1/10 ,  H03M1/44

Abstract: PROBLEM TO BE SOLVED: To provide a sample-hold circuit for reducing input common mode variations of an amplifier and to provide a pipeline A-D converter using the same.
SOLUTION: The sample-hold circuit is configured such that a plurality of switches are controlled by first and second clocks, a capacitor used for applying negative feedback to an operational amplifier and a sample capacitor used for sampling an input signal are changed over by the switches, the switches short-circuit inputs and outputs of the operational amplifier when the first clock is active, a difference between a level of a summing node and an input voltage is charged to the sample capacitor, the switches are connected to a reference voltage for determining an operating point when the second clock is active, and the sample-hold circuit amplifies the input signal according to a ratio of the sample capacitor to the feedback capacitor and provides an output of the amplified signal. The sample-hold circuit is provided with a correction circuit that applies a control signal in response to a common voltage of the input signal and the reference voltage to the operational amplifier so as to prevent the common mode component of the input signal from being fluctuated.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于减小放大器的输入共模变化的采样保持电路，并提供使用该放大器的流水线A-D转换器。 解决方案：采样保持电路被配置为使得多个开关由第一和第二时钟控制，用于向运算放大器施加负反馈的电容器和用于对输入信号进行采样的采样电容器被改变 通过开关，当第一时钟有效时，开关对运算放大器进行短路输入和输出，求和节点的电平和输入电压之间的差异被充电到采样电容器，开关连接到参考 用于在第二时钟有效时确定工作点的电压，并且采样保持电路根据采样电容器与反馈电容器的比率放大输入信号，并提供放大信号的输出。 采样保持电路设置有校正电路，该校正电路响应于输入信号的公共电压和参考电压向运算放大器施加控制信号，以防止输入信号的共模分量波动。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004260397A

公开(公告)日：2004-09-16

申请号：JP2003047168

申请日：2003-02-25

Applicant: Sony Corp ,  ソニー株式会社

Inventor： SEGAMI MASAHIRO

IPC: H03M1/78

Abstract: PROBLEM TO BE SOLVED: To obtain a good temperature characteristic even in an output current full scale.
SOLUTION: The base voltage of current source transistors (Q1-Q8) is obtained by equally dividing reference voltage by ladder resistors Rb, an OP amplifier 5 detects the emitter potential differences of the current source transistors and drives one end of the ladder resistors so that the emitter potential differences disappear. At the time, a ladder current compensation circuit 3 detects a feedback current of the OP amplifier 5 and supplies a current corresponding to the feedback current to the other end of the ladder resistors. Since a current corresponding to a current to be supplied to the ladder resistors is supplied from the other end of the ladder resistors, the current supplied to the ladder resistors for controlling the emitter potential differences offsets a current flowing into a base voltage generation circuit 2 connected to one end of the ladder resistors through the current source transistors.
COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2006121615A

公开(公告)日：2006-05-11

申请号：JP2004310007

申请日：2004-10-25

Applicant: Sony Corp ,  ソニー株式会社

Inventor： SHIGYO NOBUHIKO ,  SEGAMI MASAHIRO

IPC: H03M1/74 ,  H03M1/10

Abstract: PROBLEM TO BE SOLVED: To provide a D/A converter which is easily inspected, electronic equipment with a D/A converting unit, and method of easily inspecting the D/A converter. SOLUTION: The D/A converter includes a plurality of current sources, an analog switch for adding currents from the current sources, an operational amplifier and a decoder for controlling the analog switch in accordance with a digital signal. The decoder is characterized by selecting either a D/A conversion mode or a test mode during which the current sources are independently controlled one by one. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供易于检查的D / A转换器，具有D / A转换单元的电子设备以及容易检查D / A转换器的方法。 解决方案：D / A转换器包括多个电流源，用于从电流源加上电流的模拟开关，运算放大器和用于根据数字信号控制模拟开关的解码器。 解码器的特征在于选择D / A转换模式或测试模式，其中电流源被逐个地独立控制。 版权所有（C）2006，JPO＆NCIPI