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公开(公告)号:GB2206983B
公开(公告)日:1992-02-05
申请号:GB8816432
申请日:1988-07-11
Applicant: SONY CORP
Inventor: SHOJI NORIO
Abstract: A voltage regulator circuit arranged such that a constant current source through which a current of an integral multiple of a current from a reference current source is connected to a collector-emitter path of a transistor in series so that it is possible to suppress a base-emitter voltage of the transistor from being fluctated due to the scattering of the base impurity concentration in the transistor during the manufacturing process.
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公开(公告)号:CA1289666C
公开(公告)日:1991-09-24
申请号:CA465851
申请日:1984-10-19
Applicant: SONY CORP
Inventor: TAKEDA MASASHI , HATA IKURO , KATAKURA MASAYUKI , SHOJI NORIO
Abstract: A digital-to-analog converting system for converting a digital code having higher order bits and lower order bits to an analog value comprising: a divider for dividing input digital codes into higher order bits and lower order bits; a first digital-to-analog converter for converting the higher order bits to a higher analog value in a first converting style; a second digital-to-analog converter for converting the lower order hits to a lower analog value in a second converting style which is inferior to the first converting style in linearity; and an adder for adding together the higher and lower analog values.
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公开(公告)号:CA1277722C
公开(公告)日:1990-12-11
申请号:CA485982
申请日:1985-06-28
Applicant: SONY CORP
Inventor: SHOJI NORIO , TAKEDA MASASHI
IPC: H03K3/286 , H03K3/2885 , H03K19/086
Abstract: A logic circuit adapted for fabrication as an integrated circuit is formed having a differential amplifier operating with a constant current source and an appropriate voltage source, and having output transistors to provide the necessary output voltages, does not require a reference voltage input to the differential amplifier, thus, reference voltage transistors are not required. The two binary input signals are selected to have the same amplitude difference between the high and low levels thereof and one of the two input signals is shifted relative to the other one by the amount substantially equal to 1/2 the selected amplitude difference, and the output signals are similarly level shifted. Using this basic logic circuit as a building block other, more complex, logic circuits can be obtained.
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公开(公告)号:AU575962B2
公开(公告)日:1988-08-11
申请号:AU4425185
申请日:1985-06-27
Applicant: SONY CORP
Inventor: SHOJI NORIO , TAKEDA MASASHI
IPC: H03K3/286 , H03K3/2885 , H03K19/086 , H03K19/20
Abstract: Logic circuits based on a differential amplifier with the common emitters thereof being connected through a constant current source generally require the use of a reference voltage (Vr) and associated transistor for each such differential amplifier to provide the reference level against which the two inputs (A, B) are compared to obtain the necessary logic operations. … In order to eliminate the requirement for the reference voltage and the transistor, the input signals (A, B-) are selected to have the same relative amplitude difference (VL) between the high and low levels thereof and one of the two input signals is further controlled to be shifted relative to the other one by an amount equal to 1/2 such selected amplifier difference. The differential amplifier (42, 44) has a constant current source (50) and the respective output circuits (56, 66) are connected in emitter-follower configuration having constant current source resistors (60, 70) across which the output voltages are taken. By selecting the relative resistor values, the desired shift (1/2 VL) of the relative output level can be obtained. By employing additional sets of transistors in the differential amplifier, multiple inputs are accommodated and by utilizing output circuits having selected resistor value relationships, corresponding multiple outputs are obtained.
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公开(公告)号:GB2219898B
公开(公告)日:1992-11-11
申请号:GB8913861
申请日:1989-06-16
Applicant: SONY CORP
Inventor: SATO MITSURU , IIZUKA TETSUYA , FURUYA KIYOSHI , SHOJI NORIO , SEKINE MASATO
Abstract: An automatic gain control circuit having a variable gain amplifier circuit, a signal level detecting circuit connected to the variable gain amplifier circuit for generating a detect signal the level of which changes in response to a signal level of an output signal of the variable gain amplifier circuit, and a gain control circuit for controlling the gain of the variable gain amplifier circuit in accordance with the signal level of the detect signal, and the gain control circuit having a differential amplifier circuit having first and second input terminals, the first and second input terminals being connected to the signal level detecting circuit for receiving the detect signal, a first reference voltage source connected to the first input terminal of the differential amplifier so that a first predetermined voltage is provided instead of the signal level of the detect signal in response to the signal level of the detect signal and a second reference voltage source connected to the second input terminal of the differential amplifier for providing a second predetermined voltage.
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公开(公告)号:GB2206983A
公开(公告)日:1989-01-18
申请号:GB8816432
申请日:1988-07-11
Applicant: SONY CORP
Inventor: SHOJI NORIO
Abstract: A voltage regulator circuit arranged such that a constant current source through which a current of an integral multiple of a current from a reference current source is connected to a collector-emitter path of a transistor in series so that it is possible to suppress a base-emitter voltage of the transistor from being fluctated due to the scattering of the base impurity concentration in the transistor during the manufacturing process.
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公开(公告)号:DE3824105C2
公开(公告)日:1999-05-06
申请号:DE3824105
申请日:1988-07-15
Applicant: SONY CORP
Inventor: SHOJI NORIO
Abstract: A voltage regulator circuit arranged such that a constant current source through which a current of an integral multiple of a current from a reference current source is connected to a collector-emitter path of a transistor in series so that it is possible to suppress a base-emitter voltage of the transistor from being fluctated due to the scattering of the base impurity concentration in the transistor during the manufacturing process.
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公开(公告)号:FR2633117B1
公开(公告)日:1992-05-29
申请号:FR8908066
申请日:1989-06-16
Applicant: SONY CORP
Inventor: SATO MITSURU , IIZUKA TETSUYA , FURUYA KIYOSHI , SHOJI NORIO , SEKINE MASATO
Abstract: An automatic gain control circuit having a variable gain amplifier circuit, a signal level detecting circuit connected to the variable gain amplifier circuit for generating a detect signal the level of which changes in response to a signal level of an output signal of the variable gain amplifier circuit, and a gain control circuit for controlling the gain of the variable gain amplifier circuit in accordance with the signal level of the detect signal, and the gain control circuit having a differential amplifier circuit having first and second input terminals, the first and second input terminals being connected to the signal level detecting circuit for receiving the detect signal, a first reference voltage source connected to the first input terminal of the differential amplifier so that a first predetermined voltage is provided instead of the signal level of the detect signal in response to the signal level of the detect signal and a second reference voltage source connected to the second input terminal of the differential amplifier for providing a second predetermined voltage.
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公开(公告)号:FR2620541B1
公开(公告)日:1992-02-14
申请号:FR8809604
申请日:1988-07-13
Applicant: SONY CORP
Inventor: SHOJI NORIO
Abstract: A voltage regulator circuit arranged such that a constant current source through which a current of an integral multiple of a current from a reference current source is connected to a collector-emitter path of a transistor in series so that it is possible to suppress a base-emitter voltage of the transistor from being fluctated due to the scattering of the base impurity concentration in the transistor during the manufacturing process.
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公开(公告)号:DE3582279D1
公开(公告)日:1991-05-02
申请号:DE3582279
申请日:1985-06-25
Applicant: SONY CORP
Inventor: SHOJI NORIO , TAKEDA MASASHI
IPC: H03K3/286 , H03K3/2885 , H03K19/086
Abstract: Logic circuits based on a differential amplifier with the common emitters thereof being connected through a constant current source generally require the use of a reference voltage (Vr) and associated transistor for each such differential amplifier to provide the reference level against which the two inputs (A, B) are compared to obtain the necessary logic operations. … In order to eliminate the requirement for the reference voltage and the transistor, the input signals (A, B-) are selected to have the same relative amplitude difference (VL) between the high and low levels thereof and one of the two input signals is further controlled to be shifted relative to the other one by an amount equal to 1/2 such selected amplifier difference. The differential amplifier (42, 44) has a constant current source (50) and the respective output circuits (56, 66) are connected in emitter-follower configuration having constant current source resistors (60, 70) across which the output voltages are taken. By selecting the relative resistor values, the desired shift (1/2 VL) of the relative output level can be obtained. By employing additional sets of transistors in the differential amplifier, multiple inputs are accommodated and by utilizing output circuits having selected resistor value relationships, corresponding multiple outputs are obtained.
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