公开(公告)号：JP2011244217A

公开(公告)日：2011-12-01

申请号：JP2010114653

申请日：2010-05-18

Applicant: Sony Corp ,  ソニー株式会社

Inventor： MIYAZAKI SHINICHIRO ,  ODA KYOICHIRO ,  URUSHIBARA MINORU ,  KONDO MAKOTO ,  MATSUMURA YOICHI ,  WATANABE HIDEKI

IPC: H04N13/04 ,  G09G3/20 ,  G09G3/36

CPC classification number: H04N7/014 ,  G02B27/2264 ,  H04N7/0132 ,  H04N13/0438 ,  H04N13/0497

Abstract: PROBLEM TO BE SOLVED: To provide a video signal processing device, a video display device, and a video display system capable of reducing occurrences of flickers when a video is observed with shutter glasses.SOLUTION: A video signal processing unit 41 performs high frame rate conversion processing to an input video signal Din so that the frame rate of each video (right-eye video and left-eye video) becomes more than twice to generate a video signal D1. Then, the video signal D1 after the high frame rate conversion processing is alternately switched for each video in time division to perform video display. A shutter control unit 42 performs a control operation for shutter glasses 6 to perform an opening/closing operation synchronized with display timing of each video after the high frame rate conversion processing. In this way, a cycle of the opening/closing operation of the shutter glasses 6 becomes short (the frequency of the opening/closing operation becomes high).

Abstract translation: 要解决的问题：提供一种视频信号处理装置，视频显示装置和视频显示系统，当使用快门眼镜观察视频时能够减少闪烁的发生。 解决方案：视频信号处理单元41对输入视频信号Din执行高帧率转换处理，使得每个视频（右眼视频和左眼视频）的帧速率变得多于两次以产生视频 信号D1。 然后，对于每个视频进行高分辨率转换处理后的视频信号D1，以时分方式进行交替切换，进行视频显示。 快门控制单元42执行快门眼镜6的控制操作，以在高帧速率转换处理之后执行与每个视频的显示定时同步的打开/关闭操作。 以这种方式，快门眼镜6的打开/关闭操作的周期变短（打开/关闭操作的频率变高）。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2012169725A

公开(公告)日：2012-09-06

申请号：JP2011026793

申请日：2011-02-10

Applicant: Sony Corp ,  ソニー株式会社

Inventor： URUSHIBARA MINORU ,  HAMAZAKI HIROKI

IPC: H04N7/01

CPC classification number: H04N7/0147 ,  H04N7/013 ,  H04N7/014

Abstract: PROBLEM TO BE SOLVED: To favorably generate interpolated image data in frame interpolation processing in a multi-screen display mode.SOLUTION: A speed detection unit 115, when time-series image data Vs is data with a child screen superimposed thereon, substantially stops speed detection in a child screen area. An interpolation processing unit 117 can generate interpolated image data of a parent screen without being affected by image movements in the child screen area. A film image determination unit 116, when the time-series image data Vs is data with the child screen superimposed thereon, does not reference detected information on regularity of the child screen area at the time of determination. The film image determination unit 116 can determine whether the time-series image data (parent screen) is film image data without being affected by the image movements in the child screen area, and the interpolation processing unit 117 can reliably perform generation processing of the interpolated image data corresponding to the film image data (film image interpolation).

Abstract translation: 要解决的问题：在多画面显示模式的帧内插处理中有利地生成内插图像数据。 解决方案：当时间序列图像数据Vs是叠加有子屏幕的数据时，速度检测单元115基本上停止儿童屏幕区域中的速度检测。 内插处理单元117可以在不受儿童屏幕区域内的图像移动影响的情况下生成母屏幕的内插图像数据。 当时间序列图像数据Vs是其上叠加有子屏幕的数据时，胶片图像确定单元116在确定时未引用关于子屏幕区域的规律性的检测信息。 胶片图像确定单元116可以确定时间序列图像数据（母屏幕）是否是胶片图像数据，而不受儿童屏幕区域中的图像移动的影响，并且内插处理单元117可以可靠地执行插值的生成处理 对应于胶片图像数据的图像数据（胶片图像插值）。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2008288779A

公开(公告)日：2008-11-27

申请号：JP2007130524

申请日：2007-05-16

Applicant: Sony Corp ,  ソニー株式会社

Inventor： URUSHIBARA MINORU ,  USUKI MASAHITO ,  OE TAKAYUKI ,  KOBAYASHI KENKICHI ,  MORIYA KOJI

IPC: H04N7/01

CPC classification number: H04N5/144 ,  H04N5/44513 ,  H04N19/51 ,  H04N19/61 ,  H04N21/44008 ,  H04N21/440281

Abstract: PROBLEM TO BE SOLVED: To improve the picture quality of a picture signal after interpolation when a predetermined picture signal is superimposed on the picture signal before interpolation. SOLUTION: An MPU (Micro Processing Unit) 31 acquires OSD (On Screen Display) information, which is information about the position of a predetermined picture signal in an input picture signal; wherein the predetermined picture signal is superimposed on the input picture signal. An interpolation processing portion 72 specifies an interpolation stop region to be not applied with interpolation according to at least one motion vector in a signal between input picture signals, based on the OSD information. The interpolation processing portion 72 interpolates and outputs a signal between input picture signals in regions other than the interpolation stop region, based on a motion vector of the input picture signal; wherein the signal between input picture signals is a picture signal in an arbitrary time between the input picture signal and a previous input picture signal one place before the input picture signal. The present invention is applicable to a television receiver, for example. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：当在插值之前将预定图像信号叠加在图像信号上时，提高插值后的图像信号的图像质量。 解决方案：MPU（微处理单元）31获取作为输入图像信号中关于预定图像信号的位置的信息的OSD（屏幕显示）信息; 其中所述预定图像信号叠加在所述输入图像信号上。 内插处理部72基于OSD信息，根据输入图像信号之间的信号中的至少一个运动矢量来指定不进行插值的插值停止区域。 内插处理部分72基于输入图像信号的运动矢量内插并输出除插值停止区域之外的区域中的输入图像信号之间的信号; 其中输入图像信号之间的信号是输入图像信号与输入图像信号之前的前一个输入图像信号之间的任意时间的图像信号。 本发明可应用于例如电视接收机。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2004355048A

公开(公告)日：2004-12-16

申请号：JP2003148338

申请日：2003-05-26

Applicant: Sony Corp ,  ソニー株式会社

Inventor： URUSHIBARA MINORU ,  OGURA YOSHITO

IPC: G06F9/50

Abstract: PROBLEM TO BE SOLVED: To provide processor starting method/program having versatility, and a processor having the processor starting program.
SOLUTION: It is determined whether a program stored in a prescribed external storage area is a program which is to be executed after it is transferred to an internal storage area or a program which is to be executed while it is stored in the external storage area as it is when starting the processor. Then, the program is executed in accordance with a determined result.
COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2011061709A

公开(公告)日：2011-03-24

申请号：JP2009212072

申请日：2009-09-14

Applicant: Sony Corp ,  ソニー株式会社

Inventor： URUSHIBARA MINORU

IPC: H04N7/01 ,  G09G5/00 ,  G09G5/36 ,  G09G5/38 ,  G09G5/391

Abstract: PROBLEM TO BE SOLVED: To provide a video processing apparatus and method, capable of reducing the deterioration of image in frame rate conversion due to noises caused by image compression. SOLUTION: The video processing apparatus uses an arrangement position of an original image included in a time series image signal as a reference and calculates an amount of correction that indicates an arrangement position of an interpolated image signal to be interpolated in the time series image signal based on at least the data rate of the time series image signal. Based on the calculated amount of correction, the video processing apparatus sets creation time of the interpolated image signal to be interpolated in the time series image signal. In this case, when the data rate has changed such that, when it becomes less than a predetermined threshold, it further becomes a smaller value than the threshold, the amount of correction is calculated so that the arrangement position will be drawn closer to that of the original image, and when the data rate has changed such that, when it becomes less than the threshold, it becomes closer to the threshold, the amount of correction is so calculated as to draw the arrangement position closer to an equal position of the original image divided at equal intervals. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种视频处理装置和方法，能够减少由图像压缩引起的噪声引起的帧率转换中的图像的劣化。 解决方案：视频处理装置使用包括在时间序列图像信号中的原始图像的布置位置作为参考，并且计算指示要插值的内插图像信号在时间序列中的布置位置的校正量 至少基于时间序列图像信号的数据速率的图像信号。 基于计算出的校正量，视频处理装置在时间序列图像信号中设置待内插的内插图像信号的创建时间。 在这种情况下，当数据速率变化使得当其变得小于预定阈值时，其进一步变得比阈值小的值，则计算校正量，使得排列位置将更接近于 原始图像，并且当数据速率改变时，当其变得小于阈值时，其变得更接近阈值，则校正量被计算为将布置位置更接近于原始图像的相等位置 图像间隔相等。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2004104614A

公开(公告)日：2004-04-02

申请号：JP2002265997

申请日：2002-09-11

Applicant: Sony Corp ,  ソニー株式会社

Inventor： SAEKI KAORU ,  URUSHIBARA MINORU ,  EKO FAJAR

IPC: H04N9/00

Abstract: PROBLEM TO BE SOLVED: To provide an image information transferring device and image information transferring method for preventing an occurrence of excessive information to be eliminated without being used regardless of being transferred from an image information storing part when the image information storing part transfers image information to a display device in order to display the image information of a 4: 2: 0 format stored in the image information storing part such as a memory on the display device.
SOLUTION: When a transfer control means transfers luminance information of a 4: 2: 0 format stored in a storing means, first color difference information, and second color difference information to an image signal generating means, the transfer control means transfers luminance information constituting a first line, the first color difference information, the second color difference information, and luminance information constituting a second line as one transfer unit, to the image signal generating means.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种图像信息传送装置和图像信息传送方法，用于在图像信息存储部分传送时不管从图像信息存储部分传送而防止出现过多的信息被消除而不被使用 图像信息到显示装置，以便显示存储在显示装置上的诸如存储器的图像信息存储部分中的4：2：0格式的图像信息。 解决方案：当传送控制装置将存储在存储装置中的4:2:0格式的亮度信息，第一色差信息和第二色差信息传送到图像信号产生装置时，传送控制装置传送亮度 构成第一行的信息，第一色差信息，第二色差信息和构成作为一个传送单元的第二行的亮度信息发送给图像信号发生装置。 版权所有（C）2004，JPO

公开(公告)号：JPH09154037A

公开(公告)日：1997-06-10

申请号：JP30939495

申请日：1995-11-28

Applicant: SONY CORP

Inventor： YAMAGATA YUTAKA ,  INOUE MASARU ,  URUSHIBARA MINORU ,  MIYAZAKI SHINICHIRO ,  NAITO HIDEFUMI

IPC: H04N5/06 ,  H03L7/06 ,  H03L7/14 ,  H04N5/08

Abstract: PROBLEM TO BE SOLVED: To form a phase locked loop (PLL) in a digital circuit. SOLUTION: A synchronizing signal extracted from a video signal is gated by an AND gate 3 through a separator circuit 1, and the gated synchronizing signal is supplied to a phase comparator circuit 4. This compared output is inputted through a loop filter 5 to an oscillation circuit 6 composed of a counter and this oscillated output is inputted to the phase comparator circuit 4, so that the PLL can be formed. Further a mask signal generating circuit 10 generates that mask signal from the output of this oscillation circuit 6 and a counter 13 counts how many times the synchronizing signals are continuously absent during the period of this mask signal. When this number of times exceeds a prescribed value, the synchronizing signal from the video signal is extracted and corresponding to this signal, the counter consisting of the oscillation circuit is reset. Thus, the stable and speedy PLL and synchronizing separator circuit are constituted.

公开(公告)号：JP2009194843A

公开(公告)日：2009-08-27

申请号：JP2008036179

申请日：2008-02-18

Applicant: Sony Corp ,  ソニー株式会社

Inventor： URUSHIBARA MINORU ,  TAKEUCHI HIROSHI ,  USUKI MASAHITO ,  KOBAYASHI KENKICHI

IPC: H04N7/01

CPC classification number: G06T3/4007 ,  H04N5/145 ,  H04N7/012 ,  H04N7/014

Abstract: PROBLEM TO BE SOLVED: To provide a video processing apparatus in which judders are less apt to be perceived. SOLUTION: The video processing apparatus is for enhancing the time resolution, by generating an interpolation image signal, based on a motion vector between time series image signals input continuously. The video processing device includes: a feature change detector for detecting a change in a predetermined feature between the time series image signals; a generation time setter for setting a generation time for the interpolation image signal; and an interpolation signal generator for generating the interpolation image signal, corresponding to the generation time set by the generation time setter. When it is desired to set the generation time, after the time series image signal having a feature change detected by the feature change detector, the generation time setter sets a generation time closer to the generation time for one of the time series image signals which are disposed before or after the generation time. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种视觉处理装置，其中抖动不太容易被感知。 解决方案：视频处理装置通过基于连续输入的时间序列图像信号之间的运动矢量产生内插图像信号来增强时间分辨率。 视频处理装置包括：特征变化检测器，用于检测时间序列图像信号之间的预定特征的变化; 用于设置插值图像信号的生成时间的生成时间设定器; 以及内插信号发生器，用于产生对应于由生成时间设定器设定的生成时间的内插图像信号。 当希望设置生成时间时，在具有由特征变化检测器检测到的特征变化的时间序列图像信号之后，生成时间设定器将时间序列图像信号之一的生成时间设置为更接近于时间序列图像信号的生成时间 在发电之前或之后处置。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008236678A

公开(公告)日：2008-10-02

申请号：JP2007077279

申请日：2007-03-23

Applicant: Sony Corp ,  ソニー株式会社

Inventor： OE TAKAYUKI ,  USUKI MASAHITO ,  URUSHIBARA MINORU ,  KOBAYASHI KENKICHI ,  MORIYA KOJI

IPC: H04N7/01

CPC classification number: H04N5/44504 ,  H04N5/145 ,  H04N5/44513 ,  H04N7/014 ,  H04N19/42 ,  H04N19/44 ,  H04N19/51 ,  H04N19/577 ,  H04N21/431 ,  H04N21/44008

Abstract: PROBLEM TO BE SOLVED: To improve image quality of an image signal after subjected to interpolation, when superimposing a predetermined image signal on the image signal, before being subjected to interpolation. SOLUTION: A microprocessing unit (MPU) 31 accepts a command, to start or end superimposing of a predetermined image signal on an input image signal. When the superimposition start or end command is accepted, an interpolation processing section 72 detects the motion vector of the input image signal, on which superimposing of the predetermined image signal is started or ended, and interpolates and outputs an interpolation signal, on the basis of the motion vector without having to depend on the reliability of the motion vector as a whole. The present invention is applicable to television receivers. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了提高经过插补之后的图像信号的图像质量，当将预定图像信号叠加在图像信号上之前，进行插值。 解决方案：微处理单元（MPU）31接受命令，以便在输入图像信号上开始或结束预定图像信号的叠加。 当接收到叠加开始或结束命令时，内插处理部分72检测在其上开始或结束预定图像信号的叠加的输入图像信号的运动矢量，并基于内插信号内插并输出插值信号 运动矢量，而不必依赖于整体运动矢量的可靠性。 本发明可应用于电视接收机。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JPH0937293A

公开(公告)日：1997-02-07

申请号：JP18447095

申请日：1995-07-20

Applicant: SONY CORP

Inventor： INOUE MASARU ,  URUSHIBARA MINORU

IPC: H04N7/015 ,  H04N5/46 ,  H04N9/78

Abstract: PROBLEM TO BE SOLVED: To make the system compact by using a memory efficiently. SOLUTION: In the case of the NTSC broadcast mode, switches 22, 25, 28 are thrown to the position N and a 3-dimension comb-line filter is formed by memories 26, 27 and a subtractor 23 or the like and a chrominance carrier signal CFL is separated from a video signal SV by inter-frame processing. In this case, the video signal SV is distributed into two systems and written in the memories 26, 27. In the case of the EDTV2 mode, the switches 22, 28 are thrown to the position E and a 3-dimension comb-line filter is formed by the memory 26 and the subtractor 23 or the like and a synthesis signal (CFL+HH'FL) between the chrominance carrier signal CFL and a horizontal resolution reinforcement signal HH'FL is separated from the section SV. Furthermore, the switch 25 is thrown to the position E and a 3-dimension comb-line filter is formed by the memory 27 and the subtractor 21 or the like, and the horizontal resolution reinforcement signal HH'FL is separated from the synthesis signal (CFL+HH 'FL) through inter-field processing. The memories 26, 27 are used efficiently and the system is made compact.