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公开(公告)号:DE60124595T2
公开(公告)日:2007-09-13
申请号:DE60124595
申请日:2001-03-13
Applicant: ST MICROELECTRONICS ASIA
Inventor: OH WAH , ALDRIDGE CHRIS
Abstract: Two preferred embodiments provide slot synchronization of an initial cell search. Two Finite Impulse Response (FIR) filters are used to correlate the synchronization codes transmitted in the downlink (forward link). A sign bit is taken after the first FIR to significantly reduce the hardware requirements for the second FIR, and thus the whole system. The correlated results from the second FIR can be further processed using two different algorithms. The first adds a square operation to the correlated results whilst the second takes the magnitude before passing to the next stage. Regardless of which algorithm is adopted, the results are accumulated (I and Q), instead of averaged, and stored in a memory location for each successive correlation over the same location in different slots. The physical-layer processor (PLP) then reads the accumulated results from the memory location and searches for the peak position corresponding to the slot boundary.
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公开(公告)号:DE60124595D1
公开(公告)日:2006-12-28
申请号:DE60124595
申请日:2001-03-13
Applicant: ST MICROELECTRONICS ASIA
Inventor: OH WAH , ALDRIDGE CHRIS
Abstract: Two preferred embodiments provide slot synchronization of an initial cell search. Two Finite Impulse Response (FIR) filters are used to correlate the synchronization codes transmitted in the downlink (forward link). A sign bit is taken after the first FIR to significantly reduce the hardware requirements for the second FIR, and thus the whole system. The correlated results from the second FIR can be further processed using two different algorithms. The first adds a square operation to the correlated results whilst the second takes the magnitude before passing to the next stage. Regardless of which algorithm is adopted, the results are accumulated (I and Q), instead of averaged, and stored in a memory location for each successive correlation over the same location in different slots. The physical-layer processor (PLP) then reads the accumulated results from the memory location and searches for the peak position corresponding to the slot boundary.
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