公开(公告)号：DE69133300D1

公开(公告)日：2003-09-04

申请号：DE69133300

申请日：1991-05-23

Applicant: ST MICROELECTRONICS INC

Inventor： CHAN TSIU C ,  HAN YU-PIN ,  GURITZ ELMER

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/8244 ,  H01L27/06 ,  H01L27/092 ,  H01L27/11

Abstract: A CMOS SRAM cell has a polycrystalline silicon signal line between a common node, which is the data storage node, and the power supply. A field effect device is fabricated within this polycrystalline silicon signal line. The channel of the field effect device is separated from an active area in the substrate by a thin gate dielectric, and the active region within the substrate functions as the control gate for the field effect device. Such a device can be used to provide polycrystalline silicon P-channel transistors for use in CMOS SRAM cells.

公开(公告)号：DE69133300T2

公开(公告)日：2004-04-22

申请号：DE69133300

申请日：1991-05-23

Applicant: ST MICROELECTRONICS INC

Inventor： CHAN TSIU C ,  HAN YU-PIN ,  GURITZ ELMER

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/8244 ,  H01L27/06 ,  H01L27/092 ,  H01L27/11

Abstract: A CMOS SRAM cell has a polycrystalline silicon signal line between a common node, which is the data storage node, and the power supply. A field effect device is fabricated within this polycrystalline silicon signal line. The channel of the field effect device is separated from an active area in the substrate by a thin gate dielectric, and the active region within the substrate functions as the control gate for the field effect device. Such a device can be used to provide polycrystalline silicon P-channel transistors for use in CMOS SRAM cells.