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公开(公告)号:AT268073T
公开(公告)日:2004-06-15
申请号:AT00440068
申请日:2000-03-10
Applicant: ST MICROELECTRONICS NV
Inventor: CARBONE STEFANO
Abstract: A method for synthesizing a clock signal, said clock signal being locked to a reference clock signal, said method providing for using a third clock signal, operating at a higher frequency. The method provides the steps of: measuring the reference clock signal (CK_REF) by means of the third clock signal (CK_HIGH), operating at a higher frequency, obtaining a measured value (MES) of the reference clock signal (CK_REF) frequency; comparing the measured value (MES) with a nominal value; obtaining a correction value (CRR) as a function of the measured value (MES) and storing said correction value (CRR); using said correction value (CRR) for driving a digital controlled oscillator (OC) that outputs the synthesized clock signal (CK_SYN).
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公开(公告)号:DE69837079D1
公开(公告)日:2007-03-29
申请号:DE69837079
申请日:1998-12-23
Applicant: ST MICROELECTRONICS NV
Inventor: CARBONE STEFANO , CANAVESE ANGELO
IPC: H04L7/033
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