1.
    发明专利
    未知

    公开(公告)号:AT323969T

    公开(公告)日:2006-05-15

    申请号:AT99401290

    申请日:1999-05-31

    Abstract: The present invention relates to a frequency synthesiser for generating an output signal (So) the frequency of which has a non-integer, fractional relationship of value Nn/Nd, where Nn and Nd are integer numbers, with respect to a frequency (fr) of an input signal (Sr). The synthesiser is characterised in that it comprises means (20) for multiplying by M, where M is an integer number, the frequency of said input signal in order to produce a high frequency intermediate signal (Si), and means (21) for dividing the frequency of this intermediate signal by (MxNd)/Nn in order to generate said output signal (So).

    2.
    发明专利
    未知

    公开(公告)号:DE69930892D1

    公开(公告)日:2006-05-24

    申请号:DE69930892

    申请日:1999-05-31

    Abstract: The present invention relates to a frequency synthesiser for generating an output signal (So) the frequency of which has a non-integer, fractional relationship of value Nn/Nd, where Nn and Nd are integer numbers, with respect to a frequency (fr) of an input signal (Sr). The synthesiser is characterised in that it comprises means (20) for multiplying by M, where M is an integer number, the frequency of said input signal in order to produce a high frequency intermediate signal (Si), and means (21) for dividing the frequency of this intermediate signal by (MxNd)/Nn in order to generate said output signal (So).

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