公开(公告)号：GB2497583A

公开(公告)日：2013-06-19

申请号：GB201121688

申请日：2011-12-16

Applicant: ST MICROELECTRONICS RES & DEV ,  ST MICROELECTRONICS GRENOBLE 2

Inventor： MOORE JOHN KEVIN ,  PURCELL MATTHEW ,  STORM GRAEME ,  LULE TAREK

IPC: H04N5/353

Abstract: A method of imaging a scene with a digital image sensor comprising a pixel array comprises: performing a reset operation 500 across one row of the pixel array; integrating pixels in the row for a first calibration time; at the end of this (initial) calibration time, reading 502 pixel values of the row of pixels; comparing the pixel values with one or more predetermined thresholds (e.g., using a DAC ramp, stepped according to the threshold levels); and setting subsequent exposure levels for pixels in the pixel array based upon the pixel values. Thus, a signal is read out for a selection of pixels which acts as a calibration to govern the choice of exposure levels to be applied to the rest of the array, meaning the sensor can adapt to variations in scene intensity, improving dynamic range. Array pixels can also be vertically and horizontally addressed, enabling small areas of intensity variation across an imaged scene to be accounted for. The exposure levels can be stored as decision data, subject to low pass filtering (LPF) and controlling analogue readout circuit gain; only decision data changes applying from one pixel to another may be stored.

公开(公告)号：GB2516971A

公开(公告)日：2015-02-11

申请号：GB201314288

申请日：2013-08-09

Applicant: ST MICROELECTRONICS RES & DEV ,  ST MICROELECTRONICS GRENOBLE 2

Inventor： STORM GRAEME ,  MANDIER CHRISTOPHE

IPC: H01L27/146 ,  H04N5/30 ,  H04N5/335

Abstract: A pixel arrangement and method of use, comprising a photodiode 12, a reset transistor 18 controlled by a reset input voltage RST, a transfer gate transistor 14 controlled by a transfer gate voltage TG, configured to transfer charge from the photodiode to a charge transfer node (SN) 22 when in use and a source follower transistor 16 controlled by the node voltage and coupled to a source follower voltage when in use. During a read operation, at least one indentified voltage is increased, the identified voltage being a reset input voltage, source follower voltage, transfer gate voltage or transfer charge node voltage. Further a read transistor 20 may be included, controlled during reading by a read voltage set to a read value, which may have a time period exceeding the period during which the identified voltage is increased. Preferably, during the read operation, the transfer gate voltage signal is changed from a lower first voltage level to an intermediate voltage level and then from the intermediate voltage to a second higher voltage. The reverse may also occur, for example, second, intermediate first voltage sequence. The reset signal may be pulsed at the beginning of the read operation and at the same time as the read voltage is set to the read value. A capacitor 32 coupled to the charge transfer node may be configured to increase the voltage on the node during a read.

公开(公告)号：GB2481970A

公开(公告)日：2012-01-18

申请号：GB201011385

申请日：2010-07-06

Applicant: ST MICROELECTRONICS RES & DEV LTD

Inventor： STORM GRAEME ,  PURCELL MATTHEW

IPC: H04N5/217

Abstract: The sensor provides for an image sensor comprising: an array of pixels, each pixel having at least one photo-sensitive element; readout circuitry for receiving an analogue signal from each pixel at a first time and at a second time, between which the analogue signal changes; and associated support circuitry. The signal level at both first and second times comprises noise resultant from said pixel, and the support circuitry is a source of time variant noise on the sensor output. So, sample and hold circuitry is provided to maintain substantially level at least a proportion of this support circuitry noise. The proportion is time-invariant at the sensor output between the first time and the second time. The sample and hold circuitry may include switches 50 and a sampling capacitor 52. The support circuitry may include a regulator circuit and/or a current source. The sensor could find application in cameras and mobile phones.

公开(公告)号：GB2481970A8

公开(公告)日：2012-02-22

申请号：GB201011385

申请日：2010-07-06

Applicant: ST MICROELECTRONICS RES & DEV LTD

Inventor： STORM GRAEME ,  PURCELL MATTHEW

IPC: H04N5/217

公开(公告)号：GB2486428A

公开(公告)日：2012-06-20

申请号：GB201021144

申请日：2010-12-14

Applicant: ST MICROELECTRONICS RES & DEV

Inventor： STORM GRAEME ,  PURCELL MATTHEW ,  TOLMIE DEREK ,  MOORE JOHN KEVIN ,  WIGLEY MICHAEL

IPC: H04N5/378 ,  H04N5/347

Abstract: An image sensor comprising a pixel array in which each pixel column comprises at least two column bit-lines, a readout input circuit comprising a plurality of first inputs and a second input with each of the first inputs and the second input being connected via a capacitance to a single comparator input node and a readout comparator circuit connected to the single comparator input node. Each of the first inputs receives, in parallel, an analogue signal acquired from the output of one or more of the pixels via the column bit-line. The analogue signals vary during a pixel readout period and have a first level during a calibration period and a second level during a read period. The analogue signals at the first inputs and a reference signal from a time varying reference circuit on the second input are constantly read onto their respective capacitances during both the calibration period and the read period. The readout comparator circuit compares an average of the signals on each of the plurality of first inputs to the reference signal.

公开(公告)号：DE60333258D1

公开(公告)日：2010-08-19

申请号：DE60333258

申请日：2003-05-06

Applicant: ST MICROELECTRONICS RES & DEV

Inventor： STORM GRAEME ,  HURWITZ JONATHAN EPHRIAM DAVID

IPC: H01L27/00 ,  H04N5/335 ,  H04N5/361