1.
    发明专利
    未知

    公开(公告)号:DE69512456T2

    公开(公告)日:2000-01-20

    申请号:DE69512456

    申请日:1995-04-06

    Abstract: The method involves using a non-volatile memory (11) and address circuits (121-123). The non-volatile integrated circuit memory is divided into N sectors (S0- S31), the sectors being separately addressable by address circuits (123). The N sectors are arranged into m groups of n sectors each, the cells of each sector being selectable by other address circuits (121,122). An erasure pulse is applied simultaneously to all the sectors, or to the sectors of a group. The erasure of each sector is then verified. Repeated erasure pulses are applied, until all the sectors, or all the sectors of the group pass the verification test. Sectors are locked as it is detected that they have been successfully erased, so that in each cycle the number of sectors to be erased is reduced.

    2.
    发明专利
    未知

    公开(公告)号:DE69512456D1

    公开(公告)日:1999-11-04

    申请号:DE69512456

    申请日:1995-04-06

    Abstract: The method involves using a non-volatile memory (11) and address circuits (121-123). The non-volatile integrated circuit memory is divided into N sectors (S0- S31), the sectors being separately addressable by address circuits (123). The N sectors are arranged into m groups of n sectors each, the cells of each sector being selectable by other address circuits (121,122). An erasure pulse is applied simultaneously to all the sectors, or to the sectors of a group. The erasure of each sector is then verified. Repeated erasure pulses are applied, until all the sectors, or all the sectors of the group pass the verification test. Sectors are locked as it is detected that they have been successfully erased, so that in each cycle the number of sectors to be erased is reduced.

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