公开(公告)号：FR2816108B1

公开(公告)日：2003-02-21

申请号：FR0013949

申请日：2000-10-30

Applicant: ST MICROELECTRONICS SA

Inventor： BOISSONNET LAURENCE ,  GOLANSKI DOMINIQUE ,  RAUBER BRUNO ,  GRANIER ANDRE

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8232

Abstract: A method of simultaneously fabricating a pair of insulated gate transistors respectively having a thin oxide and a thick oxide, and an integrated circuit including a pair of transistors of this kind. Forming low-doped NLDD areas of the thin oxide second transistor includes implanting a first dopant having a first concentration and implanting a second dopant having a second concentration lower than the first concentration. Forming low-doped areas NLDD of the first, thick oxide transistor includes only said implantation of the second dopant.

公开(公告)号：FR2816108A1

公开(公告)日：2002-05-03

申请号：FR0013949

申请日：2000-10-30

Applicant: ST MICROELECTRONICS SA

Inventor： BOISSONNET LAURENCE ,  GOLANSKI DOMINIQUE ,  RAUBER BRUNO ,  GRANIER ANDRE

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8232

Abstract: The invention concerns a method wherein the formation of low doped zones (NLDD 17, 61) of the second transistor (T2) with fine oxide comprises an implantation of a first doping agent (16) having a first concentration and an implantation of a second doping agent (22) having a second concentration lower than the first concentration. The formation of low doped zones (NLDD 61) of the first transistor (T1) with thick oxide comprises only said implantation of the second doping agent (22).