公开(公告)号：FR2867873A1

公开(公告)日：2005-09-23

申请号：FR0402816

申请日：2004-03-18

Applicant: ST MICROELECTRONICS SA

Inventor： FERRAND OLIVIER ,  GRIL MAFFRE JEAN MICHEL

IPC: G06F1/26 ,  G06F9/30 ,  G06F9/38 ,  G06F15/00

Abstract: The microprocessor has a computing unit (12) with an arithmetic and logical unit (30) to execute operations associated to a determined waiting instruction of an instruction set. An internal timer (34) is activated by a control unit (14) in response to the execution of the waiting instruction to deliver a time out signal to the control unit for placing the microprocessor in a waiting state during determined time out duration. An independent claim is also included for a method of managing a waiting state of a microprocessor.

公开(公告)号：FR2867874A1

公开(公告)日：2005-09-23

申请号：FR0402929

申请日：2004-03-22

Applicant: ST MICROELECTRONICS SA

Inventor： FERRAND OLIVIER ,  GRIL MAFFRE JEAN MICHEL

IPC: G06F9/30 ,  G06F9/318 ,  G06F15/00

Abstract: The microprocessor has a mode register (30) with a determined number N of mode bits. A decoding device (28) and an execution unit (12) decodes and executes a given instruction (li) according to two execution modes based on values of a determined number (Qi) of mode bits associated to the instruction. The instruction corresponds to the respective distinct operations in the modes, where Qi is a positive whole number. An independent claim is also included for a method to control a microprocessor having a set of determined instructions that are coded on a number of bits in an instruction coding space.

公开(公告)号：FR2867872A1

公开(公告)日：2005-09-23

申请号：FR0402815

申请日：2004-03-18

Applicant: ST MICROELECTRONICS SA

Inventor： FERRAND OLIVIER ,  GRIL MAFFRE JEAN MICHEL

IPC: G06F1/26 ,  G06F1/32 ,  G06F9/30 ,  G06F9/318 ,  G06F9/38 ,  G06F15/00

Abstract: The microprocessor has a blocking device (54) controlled by a control device (34) based on execution of a wait instruction belonging to an instruction set to place the microprocessor in a wait state over an undetermined period. The output of the microprocessor is conditioned by a determined value or a change determined from a value of a condition bit stored in a condition register (100) internal or external to the microprocessor. An independent claim is also included for a method of controlling a microprocessor.