公开(公告)号：DE602008000766D1

公开(公告)日：2010-04-22

申请号：DE602008000766

申请日：2008-01-25

Applicant: ST MICROELECTRONICS SA

Inventor： NOIRE ALINE ,  THEROND BENJAMIN

IPC: H01F17/00

Abstract: The element (3``) has plane windings (31-36) formed in a N number of lower conductive levels i.e. metallic levels, of an integrated circuit with respect to specific number of windings, where the windings (32, 33) are interdigitized in a same conducting level and are of rectangular, circular or orthogonal shape. Outer ends (311, 321) define access terminals that are placed at the exterior of the windings (31, 32), which are formed in respective levels. The windings are connected with respect to one another by a number of vias (51-55) that is equal to a number of conducting levels.

公开(公告)号：FR2830126A1

公开(公告)日：2003-03-28

申请号：FR0112378

申请日：2001-09-26

Applicant: ST MICROELECTRONICS SA

Inventor： NOIRE ALINE ,  CONCORD JOEL

IPC: H01F17/00 ,  H01L21/02 ,  H01L27/08 ,  H01L23/66 ,  H01F5/00

Abstract: The inductor includes a connecting track belonging to a metallization level higher than the metallization level of a spiral (20), for connecting the internal end (24) of the spiral and another connection track (26) which is formed of same metallization level.

公开(公告)号：FR2911992A1

公开(公告)日：2008-08-01

申请号：FR0752957

申请日：2007-01-30

Applicant: ST MICROELECTRONICS SA

Inventor： NOIRE ALINE ,  THEROND BENJAMIN

IPC: H01F27/28 ,  H01F17/00 ,  H01L23/60 ,  H02H9/00 ,  H02M1/00 ,  H04B1/38

Abstract: L'invention concerne un élément inductif (3") formé d'enroulements plans (31, 32, 33, 34, 35, 36) dans différents niveaux conducteurs, les enroulements étant réalisés dans un nombre de niveaux inférieurs d'une unité par rapport au nombre d'enroulements, deux (32, 33) des enroulements étant inter-digités dans un même niveau.

公开(公告)号：FR2830126B1

公开(公告)日：2004-10-01

申请号：FR0112378

申请日：2001-09-26

Applicant: ST MICROELECTRONICS SA

Inventor： NOIRE ALINE ,  CONCORD JOEL

IPC: H01F17/00 ,  H01L21/02 ,  H01L27/08 ,  H01L23/66 ,  H01F5/00

Abstract: An inductance integrated in a monolithic circuit, including a conductive spiral having an internal end connected to a connection track, the spiral and the connection track belonging to a same metallization level, in which the connection between the internal end of the spiral and the connection track is formed by a connecting track belonging to a metallization level higher than the metallization level of the spiral.