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公开(公告)号：FR2796226A1
公开(公告)日：2001-01-12
申请号：FR9909051
申请日：1999-07-09
Applicant: ST MICROELECTRONICS SA
Inventor： KARI AHMED , TIWARI VINEET
IPC: G06K7/00 , H03K9/04 , H03M7/00 , G06K19/073 , H03K7/04
Abstract: Control circuit (40) includes first flip-flop (47) which outputs validation signal when first low pulse appears on the binary signal to be decrypted. It also includes second flip-flop (48) which outputs memorized signal when second low pulse appears on the binary signal to be decrypted. A logic gate (50) supplies zero reset signal to the RST terminals of the flip-flops when the control circuit is energized or when the counter reaches a maximum number of counted pulses. Decoder for binary signals transmitted to a smart card by pulse position modulation. The binary signals represent at least a binary number of 2(n + 2) coded by pulse position corresponding to a binary number N of n bits, n being a whole number. The decoder includes: (a) a counting circuit (10) which counts the pulses of s clock signal and provides the binary number N; a memory circuit (20) which stores the binary number N, and; a control circuit (40) which receives the binary signal to be decrypted and which provides a validation signal to start the counting circuit (10) and a memorized signal to effect the transfer of the number N from the counting circuit to the memory circuit.
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公开(公告)号：FR2801745A1
公开(公告)日：2001-06-01
申请号：FR9915075
申请日：1999-11-30
Applicant: ST MICROELECTRONICS SA
Inventor： TIWARI VINEET
Abstract: The electromagnetic transponder (10) has a parallel oscillator circuit (C2,L2) extracting a radiating field. A voltage measure (18) of the recovered signal activates a detuning circuit (C3) when the voltage level exceeds a set level, indicating high incoming power.
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Patent Agency Ranking
公开(公告)号：FR2801745B1
公开(公告)日：2007-05-25
申请号：FR9915075
申请日：1999-11-30
Applicant: ST MICROELECTRONICS SA
Inventor： TIWARI VINEET
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公开(公告)号：FR2783942B1
公开(公告)日：2004-02-13
申请号：FR9812199
申请日：1998-09-30
Applicant: ST MICROELECTRONICS SA
Inventor： TIWARI VINEET
Abstract: A voltage regulation device is provided for receiving a voltage at an input node and supplying a regulated voltage to electronic circuitry at an output node. The device includes a switching circuit that is coupled between the input node and the output node, and a control circuit that is coupled to the switching circuit. When the voltage level at the output node is below a threshold voltage, the control circuit controls the switching circuit so as to substantially short-circuit the input node and the output node. On the other hand, when the voltage level at the output node is not below the threshold voltage, the control circuit controls the switching circuit so as to substantially isolate the input node from the output node. In a preferred embodiment, the switching circuit includes an NMOS transistor, and the control circuit includes a differential amplifier that supplies a control signal to the gate of the NMOS transistor. A smart card containing a voltage regulation device is also provided.
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公开(公告)号：FR2808634A1
公开(公告)日：2001-11-09
申请号：FR0005802
申请日：2000-05-05
Applicant: ST MICROELECTRONICS SA
Inventor： BARDOUILLET MICHEL , DONAT NATHALIE , TIWARI VINEET
Abstract: The electromagnetic transponder has an oscillating circuit to extract the high frequency amplitude modulated signal and a demodulator (17) of the digital words carried. There are separate regulators for the voltage feed and the voltage carrying the digital words (61,70). The digital word voltage has a time constant above that of the voltage feed adjustment.
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公开(公告)号：FR2796226B1
公开(公告)日：2001-08-10
申请号：FR9909051
申请日：1999-07-09
Applicant: ST MICROELECTRONICS SA
Inventor： KARI AHMED , TIWARI VINEET
IPC: G06K7/00 , H03K9/04 , H03M7/00 , G06K19/073 , H03K7/04
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公开(公告)号：FR2783942A1
公开(公告)日：2000-03-31
申请号：FR9812199
申请日：1998-09-30
Applicant: ST MICROELECTRONICS SA
Inventor： TIWARI VINEET
Abstract: The circuit uses a differential amplifier and switching transistor to isolate output voltage node when excess input is applied. The circuit provides control of the voltage received on an input node (N1), the voltage (VDC) being extracted from a radio frequency wave. The circuit provides a regulated voltage (VREG) on an output node (N2) feeding an electronic circuit (1). The control includes a switching circuit (3) connected between the input node and the output node, controlled by a control circuit (4 - SWGATE). This acts to short circuit the input node (N1) and the output node (N2) when the voltage available on the output node is lower than a determined threshold level, and to isolate the input and output nodes in the opposite case. The switching of this circuit is provided by an MOS transistor (T1) of N-type. The control circuit may include a differential amplifier (5) receiving on its inputs the voltages for comparison, and providing on the output a control signal (SWGATE) applied to the grid of the transistor.
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