公开(公告)号：ITVA20080041A1

公开(公告)日：2010-01-02

申请号：ITVA20080041

申请日：2008-07-01

Applicant: ST MICROELECTRONICS SRL

Inventor： LA SCALA AMEDEO ,  PULVIRENTI FRANCESCO

公开(公告)号：IT1395477B1

公开(公告)日：2012-09-21

申请号：ITTO20090689

申请日：2009-09-08

Applicant: ST MICROELECTRONICS SRL

Inventor： LA SCALA AMEDEO ,  DONDINI MIRKO

公开(公告)号：ITTO20090689A1

公开(公告)日：2011-03-09

申请号：ITTO20090689

申请日：2009-09-08

Applicant: ST MICROELECTRONICS SRL

Inventor： DONDINI MIRKO ,  LA SCALA AMEDEO

公开(公告)号：DE60114761D1

公开(公告)日：2005-12-15

申请号：DE60114761

申请日：2001-01-31

Applicant: ST MICROELECTRONICS SRL

Inventor： LA SCALA AMEDEO

IPC: G01R31/3185

Abstract: The Test Access Port (TAP) functions of a plurality of components arranged on a single chip (10) are managed by selectively driving the TAP function (20, 30, 40) of each of the components with respective clocks (TCK, DCK), whilst the further signals for driving the TAP function (TDI, TDO, TMS, NTRST) are used in shared mode among the various components. Preferably, associated to the aforesaid clocks is a pull-down function for selectively blanking the respective clocks in conditions of non-use. In a preferred way, the aforesaid dedicated clocks (DCK, TCK) are generated on board the chip (10).

公开(公告)号：IT1390778B1

公开(公告)日：2011-09-23

申请号：ITVA20080041

申请日：2008-07-01

Applicant: ST MICROELECTRONICS SRL

Inventor： LA SCALA AMEDEO ,  SIGNORELLI TIZIANA TERESA