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    INTEGRATED CIRCUIT FOR CONTROLLING A SWITCH OF A CURRENT PATH WITH LEADING EDGE BLANKING DEVICE OF THE CURRENT SIGNAL.
    1.
    发明申请
    INTEGRATED CIRCUIT FOR CONTROLLING A SWITCH OF A CURRENT PATH WITH LEADING EDGE BLANKING DEVICE OF THE CURRENT SIGNAL. 审中-公开
    用于控制电流信号开关的集成电路与电流信号的边缘边缘封装装置的集成电路。

    公开(公告)号：WO2011138276A2

    公开(公告)日：2011-11-10

    申请号：PCT/EP2011056956

    申请日：2011-05-02

    Applicant: ST MICROELECTRONICS SRL ,  SPINI CLAUDIO ,  ADRAGNA CLAUDIO

    Inventor： SPINI CLAUDIO ,  ADRAGNA CLAUDIO

    IPC: H02M3/335

    CPC classification number: H02M3/33507 ,  H02M3/33515 ,  H02M3/33553

    Abstract: An integrated control circuit of a switch is described, which is adapted to open or close a current path; said integrated circuit includes a comparator to compare a first signal with a second signal representative of the current flowing through said current path. The comparator outputs a third variable signal between a low logic level and a high logic level according to whether said second signal is lower than said first signal or vice versa; the integrated circuit has a driver to generate a signal to drive said switch in response to the third signal, and is configured to detect a spike on the leading edge of said second signal and to blank said third signal for a first blanking time period which depends on a turn-on delay of said switch and a second blanking period which depends on the duration of said spike on the leading edge of said second signal.

    Abstract translation: 描述了开关的集成控制电路，其适于打开或关闭电流路径; 所述集成电路包括比较器，用于将第一信号与表示流过所述电流路径的电流的第二信号进行比较。 所述比较器根据所述第二信号是否低于所述第一信号而输出低逻辑电平和高逻辑电平之间的第三可变信号，反之亦然; 所述集成电路具有驱动器，以产生响应于所述第三信号来驱动所述开关的信号，并且被配置为检测所述第二信号的前沿上的尖峰，并且将所述第三信号置为空白，所述第一消隐时间段取决于 在所述开关的导通延迟上，以及取决于所述第二信号的前沿上的所述尖峰的持续时间的第二消隐周期。

    5.
    发明专利
    未知

    公开(公告)号：DE60014357T2

    公开(公告)日：2005-11-03

    申请号：DE60014357

    申请日：2000-07-18

    Applicant: ST MICROELECTRONICS SRL

    Inventor： ADRAGNA CLAUDIO ,  SPINI CLAUDIO

    IPC: H02M1/00 ,  H02M1/36 ,  H02M3/335

    Abstract: The present invention relates to a start up circuit for commutation power supplies (PWM) or DC/DC converters and to a commutation type power supply comprising such a start up circuit. In an embodiment the start up circuit for commutation power supplies having an input terminal (In) and an output terminal (OUT) comprises: a first current generator (41) able to supply a first prefixed current (I) connected between said input terminal (In) and a first node (45); said first node (45) is coupled to said output terminal (OUT); characterized by further comprising a second current generator (42) able to supply a second prefixed current (K*I) connected between said input terminal (In) and a first terminal of a first controlled switch (44); the value of said second prefixed current (K*I) is greater than or equal to the value of said first prefixed current (I); a second terminal of said first controlled switch (44) is connected to said first node (45); a control circuit (43, V3) of said first controlled switch (44) able to maintain closed said first controlled switch (44) in the case in which the voltage on said output terminal (OUT) is lower than a first prefixed voltage (V3).

    6.
    发明专利
    未知

    公开(公告)号：DE60014357D1

    公开(公告)日：2004-11-04

    申请号：DE60014357

    申请日：2000-07-18

    Applicant: ST MICROELECTRONICS SRL

    Inventor： ADRAGNA CLAUDIO ,  SPINI CLAUDIO

    IPC: H02M1/00 ,  H02M1/36 ,  H02M3/335

    Abstract: The present invention relates to a start up circuit for commutation power supplies (PWM) or DC/DC converters and to a commutation type power supply comprising such a start up circuit. In an embodiment the start up circuit for commutation power supplies having an input terminal (In) and an output terminal (OUT) comprises: a first current generator (41) able to supply a first prefixed current (I) connected between said input terminal (In) and a first node (45); said first node (45) is coupled to said output terminal (OUT); characterized by further comprising a second current generator (42) able to supply a second prefixed current (K*I) connected between said input terminal (In) and a first terminal of a first controlled switch (44); the value of said second prefixed current (K*I) is greater than or equal to the value of said first prefixed current (I); a second terminal of said first controlled switch (44) is connected to said first node (45); a control circuit (43, V3) of said first controlled switch (44) able to maintain closed said first controlled switch (44) in the case in which the voltage on said output terminal (OUT) is lower than a first prefixed voltage (V3).

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