公开(公告)号：DE60214496D1

公开(公告)日：2006-10-19

申请号：DE60214496

申请日：2002-09-27

Applicant: ST MICROELECTRONICS SRL ,  OVONYX INC

Inventor： CASAGRANDE GIULIO ,  LOWREY TYLER ,  BEZ ROBERTO ,  WICKER GUY ,  SPALL EDWARD ,  HUDGENS STEPHEN ,  CZUBATYJ WOLODYMYR

IPC: G11C11/34 ,  G11C11/56 ,  G11C16/02

Abstract: A memory device (100) including a plurality of memory cells (Mh,k), a plurality of insulated first regions (220h) of a first type of conductivity formed in a chip of semiconductor material (203), at least one second region (230k) of a second type of conductivity formed in each first region, a junction between each second region and the corresponding first region defining a unidirectional conduction access element (Dh,k) for selecting a corresponding memory cell connected to the second region when forward biased, and at least one contact (225h) for contacting each first region; a plurality of access elements are formed in each first region, the access elements being grouped into at least one sub-set consisting of a plurality of adjacent access elements (Dh,k,Dh,k+1) without interposition of any contact, and the memory device further includes means (110c,113,125) for forward biasing the access elements of each sub-set simultaneously.