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公开(公告)号：US20230005540A1
公开(公告)日：2023-01-05
申请号：US17930250
申请日：2022-09-07
Applicant: ST Microelectronics (Rousset) SAS
Inventor： François Tailliet , Marc Battista
IPC: G11C14/00
Abstract: An embodiment integrated circuit comprises a memory device including at least one memory point having a volatile memory cell and a single non-volatile memory cell coupled together to a common node.
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