公开(公告)号：EP0330371A1

公开(公告)日：1989-08-30

申请号：EP89301494.4

申请日：1989-02-16

Applicant: STC PLC

Inventor： Ojha, Sureshchandra Mishrilal ,  Jennings, Stephen Robert ,  Johnston, Anthony Denis ,  Naden, James Mark

IPC: H01L21/31 ,  H01L21/285

CPC classification number: H01L21/32137

Abstract: A polysilicon layer or a single crystal silicon substrate is plasma etched in a two staged process. The first stage was a non-selective anisotropic etch to define a desired pattern by etching part way through the polysilicon. The second stage was a selective etch to secure remaining polysilicon and expose the substrate.

Abstract translation: 多晶硅层或单晶硅衬底在两阶段工艺中进行等离子体蚀刻。 第一阶段是通过蚀刻部分地通过多晶硅来定义所需图案的非选择性各向异性蚀刻。 第二阶段是选择性蚀刻以确保剩余的多晶硅并暴露衬底。