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公开(公告)号：WO2012080732A1
公开(公告)日：2012-06-21
申请号：PCT/GB2011/052478
申请日：2011-12-14
Applicant: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED , STORM, Graeme , PURCELL, Matthew , TOLMIE, Derek , MOORE, John Kevin , WIGLEY, Michael
Inventor： STORM, Graeme , PURCELL, Matthew , TOLMIE, Derek , MOORE, John Kevin , WIGLEY, Michael
Abstract: Disclosed is an image sensor comprising: a plurality of pixels arranged in rows and columns to form a pixel array, each pixel column comprising at least two column bitlines, such that an output of each pixel is connected to one of the column bitlines of the column of which it is comprised; a readout input circuit comprising a plurality of first inputs and a second input, each of the first inputs and the second input being connected via a capacitance to a single comparator input node; and a readout comparator circuit connected to the single comparator input node. Each of the first inputs receives, in parallel, an analogue signal, the analogue signals being acquired from the signal output of one or more of the pixels via the column bitline to which the pixel is connected, the analogue signals varying during a pixel readout period and having a first level during a first calibration period and a second level during a second read period. The analogue signals at the first inputs and a reference signal from a time varying reference circuit on the second input are constantly read onto their respective capacitances during both the first calibration period and the second read period. The readout comparator circuit compares an average of the signals on each of the plurality of first inputs to the reference signal.
Abstract translation: 公开了一种图像传感器，包括：排列成行和列以形成像素阵列的多个像素，每个像素列包括至少两列列位线，使得每个像素的输出连接到列的列位线之一 它包括在内; 读出输入电路，包括多个第一输入和第二输入，所述第一输入和所述第二输入中的每一个经由电容连接到单个比较器输入节点; 以及连接到单个比较器输入节点的读出比较器电路。 每个第一输入并行地接收模拟信号，模拟信号是通过与像素连接的列位线从一个或多个像素的信号输出中获取的，模拟信号在像素读出期间变化 并且在第一读取周期期间在第一校准周期期间具有第一电平和第二电平。 第一输入处的模拟信号和来自第二输入端的时变参考电路的参考信号在第一校准周期和第二读取周期期间都恒定地读取到它们各自的电容上。 读出比较器电路将多个第一输入中的每一个上的信号的平均值与参考信号进行比较。
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公开(公告)号：EP3297105A1
公开(公告)日：2018-03-21
申请号：EP16189306.0
申请日：2016-09-16
Inventor： LEE, Denise , STORM, Graeme
IPC: H01S5/042 , H05B33/08 , H01S5/0683
CPC classification number: H01S5/042 , H01S5/0261 , H01S5/0683 , H01S5/183
Abstract: A driver circuit for a laser diode configured to pass a current, said circuit comprising: a first transistor connected in series with the laser diode, and configured to regulate the current; and a voltage regulator configured to provide an input to a gate of the first transistor so as to regulate the current in dependence upon a regulator input and a feedback input at the voltage regulator.
Abstract translation: 1。一种激光二极管的驱动器电路，被配置为传递电流，所述电路包括：第一晶体管，与所述激光二极管串联连接，并且被配置为调节电流; 以及电压调节器，被配置为向第一晶体管的栅极提供输入，以便根据调节器输入和电压调节器处的反馈输入来调节电流。
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公开(公告)号：EP3588703A1
公开(公告)日：2020-01-01
申请号：EP18179161.7
申请日：2018-06-21
Inventor： LEE, Denise , STORM, Graeme , VENUGOPALAN NAIR JALAJAKUMARI, Aravind , ALEXANDROPOULOS, Alexios
IPC: H01S5/042 , H01S5/0683 , H01S5/183 , H02M3/00
Abstract: A driver circuit for a laser diode configured to pass a current, said circuit comprising: a charge-pump configured to generate an output boosted positive supply rail voltage; at least one switch configured to couple the output of the charge-pump to a terminal of the laser diode and to isolate the positive supply rail from the terminal of the laser diode when the charge-pump is enabled.
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Patent Agency Ranking
公开(公告)号：EP4294130A1
公开(公告)日：2023-12-20
申请号：EP23177887.9
申请日：2023-06-07
Inventor： COLLINS, Steven , STORM, Graeme , HEGDE, Supriya Raveendra
IPC: H05B47/105 , H01S5/00
Abstract: An optical element is positioned in a holder over a laser light source. The optical element includes an electrical trace that is coupled between first and second pads. A sensing circuit that is also coupled to the first and second pads performs a voltage/current sensing operation to detect displacement of the optical element and control enablement of the laser light source.
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公开(公告)号：EP3287813A1
公开(公告)日：2018-02-28
申请号：EP16185753.7
申请日：2016-08-25
Inventor： STORM, Graeme , MOORE, John Kevin
IPC: G01T1/24 , H01L31/107 , H04N5/335 , G01S7/486 , G01S7/497
CPC classification number: G01J1/4204 , G01J1/0228 , G01J1/44 , G01J2001/442 , G01J2001/4466 , G01S7/4863 , G01S7/497 , G01T1/248 , H01L31/107
Abstract: An apparatus comprising: at least one single photon avalanche diode pixel configured to operate in a first mode to output a digital single photon detection event, the pixel comprising: a single photon avalanche diode; and at least one output transistor configured to provide an analogue output current from the single photon avalanche diode, such that the at least one single photon avalanche diode pixel is further configured to operate in a second mode to output the analogue output current indicating a level of illumination of the pixel.
Abstract translation: 1。一种装置，包括：至少一个单光子雪崩二极管像素，被配置为以第一模式操作以输出数字单光子探测事件，所述像素包括：单光子雪崩二极管; 以及至少一个输出晶体管，被配置为提供来自单光子雪崩二极管的模拟输出电流，使得所述至少一个单光子雪崩二极管像素还被配置为以第二模式操作以输出模拟输出电流，所述模拟输出电流指示 像素的照明。
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公开(公告)号：EP2652942A1
公开(公告)日：2013-10-23
申请号：EP11805919.5
申请日：2011-12-14
Inventor： STORM, Graeme , PURCELL, Matthew , TOLMIE, Derek , MOORE, John Kevin , WIGLEY, Michael
Abstract: Disclosed is an image sensor comprising: a plurality of pixels arranged in rows and columns to form a pixel array, each pixel column comprising at least two column bitlines, such that an output of each pixel is connected to one of the column bitlines of the column of which it is comprised; a readout input circuit comprising a plurality of first inputs and a second input, each of the first inputs and the second input being connected via a capacitance to a single comparator input node; and a readout comparator circuit connected to the single comparator input node. Each of the first inputs receives, in parallel, an analogue signal, the analogue signals being acquired from the signal output of one or more of the pixels via the column bitline to which the pixel is connected, the analogue signals varying during a pixel readout period and having a first level during a first calibration period and a second level during a second read period. The analogue signals at the first inputs and a reference signal from a time varying reference circuit on the second input are constantly read onto their respective capacitances during both the first calibration period and the second read period. The readout comparator circuit compares an average of the signals on each of the plurality of first inputs to the reference signal.
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公开(公告)号：EP3287813B1
公开(公告)日：2019-10-02
申请号：EP16185753.7
申请日：2016-08-25
Inventor： STORM, Graeme , MOORE, John Kevin
IPC: G01T1/24 , H01L31/107 , H04N5/335 , G01S7/486 , G01S7/497
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公开(公告)号：EP2652942B1
公开(公告)日：2015-11-18
申请号：EP11805919.5
申请日：2011-12-14
Inventor： STORM, Graeme , PURCELL, Matthew , TOLMIE, Derek , MOORE, John Kevin , WIGLEY, Michael
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