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    Amplifier input switch configuration with improved PSRR
    1.
    发明公开
    Amplifier input switch configuration with improved PSRR 审中-公开
    VerstärkereingangsschalterkonfigurationmiterhöhterPSRR

    公开(公告)号：EP1811653A1

    公开(公告)日：2007-07-25

    申请号：EP06100662.3

    申请日：2006-01-20

    Applicant: STMicroelectronics SA ,  STMicroelectronics Design and Application S.R.O.

    Inventor： Saman, Hynek ,  Murin, Peter ,  Boksa, Martin ,  Panus, Pavel

    IPC: H03F1/30 ,  H03F3/217 ,  H03F3/72 ,  G05F1/575

    CPC classification number: H03F1/30 ,  H03F1/26 ,  H03F3/45475 ,  H03F3/45632 ,  H03F3/72 ,  H03F2200/372 ,  H03F2200/459 ,  H03F2203/45534

    Abstract: The invention concerns a switch comprising a first transistor comprising a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage level, and first control means connected to said control terminal of said first transistor, comprising a first node connected to said first clean voltage level, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, said first control means arranged to selectively connect said control terminal of said first transistor to one of said first node and said second node based on said first input control signal.

    Abstract translation: 本发明涉及一种包括第一晶体管的开关，第一晶体管包括连接到第一开关节点的第一主端子，连接到第二开关节点的第二主端子和控制端子，第二开关节点连接到第一清洁电压电平，以及 连接到所述第一晶体管的所述控制端的第一控制装置，包括连接到所述第一清洁电压电平的第一节点，连接到第二电压电平的第二节点和用于接收第一输入控制信号变量的控制输入节点 电源电压和第三电压电平，所述第一控制装置被布置成基于所述第一输入控制信号选择性地将所述第一晶体管的控制端连接到所述第一节点和所述第二节点之一。

    Capacitive load driving amplifier
    3.
    发明公开
    Capacitive load driving amplifier 有权
    Antriebsverstärkerfürkapazitive Lasten

    公开(公告)号：EP2341616A1

    公开(公告)日：2011-07-06

    申请号：EP09180680.2

    申请日：2009-12-23

    Applicant: STMicroelectronics Design and Application S.R.O.

    Inventor： Murin, Peter ,  Folk, Tomas ,  Panus, Pavel

    IPC: H03F3/45

    CPC classification number: H03F3/45183 ,  H03F3/45475

    Abstract: The invention relates to an electronic amplifier (100) for driving a capacitive load (C), which comprises a first and a second differential input terminals (IN1, IN2) to receive an input signal (Vin), and first (OUT1) and second (OUT2) differential output terminals to provide a differential output signal (Vout). The amplifier further comprises:
    - a first (101) operational device having a first (S-) and a second (S+) differential inputs connected to the first and second input terminals (IN1, IN2), respectively, and an output connected to the first output terminal (OUT1), and
    - a second (102) operational device having a further first (T+) and a further second (T-) differential inputs connected to the first and second input terminals (IN1, IN2), respectively, and a further output connected to the second output terminal (OUT2). The first (101) and second (102) operational devices are operatively configured so that both the first (OUT1) and the second (OUT2) output terminals are sunk to a same reference potential (GND) during periods in which a module of differential output signal (Vout) amplitude decrease.

    Abstract translation: 本发明涉及一种用于驱动电容性负载（C）的电子放大器（100），其包括用于接收输入信号（Vin）的第一和第二差分输入端（IN1，IN2）和第一（OUT1）和第二 （OUT2）差分输出端子提供差分输出信号（Vout）。 放大器还包括： - 第一（101）操作装置，具有分别连接到第一和第二输入端子（IN1，IN2）的第一（S）和第二（S +）差分输入端，以及连接到 第一输出端子（OUT1）和 - 第二（102）操作装置，其具有分别连接到第一和第二输入端子（IN1，IN2）的另外的第一（T +）和另外的第二（T）差分输入，以及 连接到第二输出端（OUT2）的另一输出。 第一（101）和第二（102）操作装置可操作地构造成使得在差分输出模块的时段期间，第一（OUT1）和第二（OUT2）输出端都被吸入相同的参考电位（GND） 信号（Vout）振幅减小。

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