公开(公告)号：EP1257119B1

公开(公告)日：2006-05-17

申请号：EP01303461.6

申请日：2001-04-12

Applicant: STMicroelectronics Limited

Inventor： Lewis, David ,  Gurney, Howard

IPC: H04N5/44 ,  H04N7/50 ,  H04N5/00

CPC classification number: H04N21/4383 ,  H04N21/42646 ,  H04N21/42661 ,  H04N21/42669 ,  H04N21/42692 ,  H04N21/434 ,  H04N21/44004

公开(公告)号：EP0933927A1

公开(公告)日：1999-08-04

申请号：EP99300684.0

申请日：1999-01-29

Applicant: STMicroelectronics Limited

Inventor： Maccormack, Andrew ,  Gurney, Howard ,  Robbins, William ,  Rovati, Fabrizio

IPC: H04N5/00

CPC classification number: H04N21/434

Abstract: The present invention relates to the demultiplexing of a digital data stream in a receiver so as to retain only those parts of the digital data stream required by the receiver. Such demultiplexing is particularly useful when applied to a receiver circuit in a television system having a digital set-top-box.
A memory in the receiver stores packet identifiers of data packets required by the receiver, which are stored in the memory under the control of a first control circuit. A second control circuit extracts packet identifiers from incoming data packets in an input digital data stream. A third control circuit receives the extracted packet identifier and determines whether this matches one of the packet identifiers stored in the memory. A match signal is set by the third control circuit to the second control circuit responsive to a match. The second control circuit demultiplexes the input data packet responsive to the match signal.

Abstract translation: 本发明涉及在接收机中解复用数字数据流，以仅保留接收机所需的数字数据流的那些部分。 当应用于具有数字机顶盒的电视系统中的接收机电路时，这种解复用特别有用。 接收机中的存储器存储由第一控制电路控制的存储在存储器中的接收器所需的数据分组的分组标识符。 第二控制电路从输入数字数据流中的输入数据分组提取分组标识符。 第三控制电路接收提取的分组标识符并确定其是否匹配存储在存储器中的分组标识符之一。 响应于匹配，第三控制电路将匹配信号设置到第二控制电路。 第二控制电路响应于匹配信号对输入数据分组进行解复用。

公开(公告)号：EP1544704A1

公开(公告)日：2005-06-22

申请号：EP03258079.7

申请日：2003-12-19

Applicant: STMicroelectronics Limited

Inventor： Dellow, Andrew ,  Gurney, Howard

IPC: G06F1/00

CPC classification number: G06F21/72 ,  G06F12/1408 ,  G06F21/79 ,  G06F21/85

Abstract: A monolithic semiconductor integrated circuit is provided for selectively encrypting or decrypting data transmitted between one of a plurality of devices on the circuit and an external memory. Two series of data pathways connect the devices and the external memory. The first series of data pathways passes through a cryptographic circuit causing data to be encrypted or decrypted, and the other series of data pathways provides an unhindered route. When a data access request is made by a device, the data is selectively routed along one of the two series of data pathways according to the identification of the device making the data access request. In one example, if data is transmitted from a device to the external memory, the data is selectively encrypted before being stored in the external memory if the device transmitting the data is identified as secure. Then, when that data is retrieved from the external memory by a second device, the data is selectively decrypted only if the second device is identified as secure.

Abstract translation: 一种单片半导体集成电路提供了一种用于选择性地加密或解密电路上的设备中的多个之一之间和外部存储器中的数据的反式mitted。 两个系列的数据通路的连接的装置和外部存储器中。 所述第一系列数据通路的经过加密电路使得数据被加密或解密，并且其他系列数据通路上不受阻碍的路径提供。 当一个数据访问请求是由设备做出，该数据被沿着两个系列gemäß到使数据访问请求的装置的识别数据通路中的一个选择性地路由。 在一个实施例中，如果数据是从一个装置到外部存储器反式mitted，数据被选择性地存储在外部存储器如果发射数据的设备被识别为安全的之前被加密。 然后，当没有由第二设备从外部存储器中检索数据，该数据被选择性地解密仅当所述第二设备被识别为安全的。