公开(公告)号：EP0933927A1

公开(公告)日：1999-08-04

申请号：EP99300684.0

申请日：1999-01-29

Applicant: STMicroelectronics Limited

Inventor： Maccormack, Andrew ,  Gurney, Howard ,  Robbins, William ,  Rovati, Fabrizio

IPC: H04N5/00

CPC classification number: H04N21/434

Abstract: The present invention relates to the demultiplexing of a digital data stream in a receiver so as to retain only those parts of the digital data stream required by the receiver. Such demultiplexing is particularly useful when applied to a receiver circuit in a television system having a digital set-top-box.
A memory in the receiver stores packet identifiers of data packets required by the receiver, which are stored in the memory under the control of a first control circuit. A second control circuit extracts packet identifiers from incoming data packets in an input digital data stream. A third control circuit receives the extracted packet identifier and determines whether this matches one of the packet identifiers stored in the memory. A match signal is set by the third control circuit to the second control circuit responsive to a match. The second control circuit demultiplexes the input data packet responsive to the match signal.

Abstract translation: 本发明涉及在接收机中解复用数字数据流，以仅保留接收机所需的数字数据流的那些部分。 当应用于具有数字机顶盒的电视系统中的接收机电路时，这种解复用特别有用。 接收机中的存储器存储由第一控制电路控制的存储在存储器中的接收器所需的数据分组的分组标识符。 第二控制电路从输入数字数据流中的输入数据分组提取分组标识符。 第三控制电路接收提取的分组标识符并确定其是否匹配存储在存储器中的分组标识符之一。 响应于匹配，第三控制电路将匹配信号设置到第二控制电路。 第二控制电路响应于匹配信号对输入数据分组进行解复用。

公开(公告)号：EP0940756B1

公开(公告)日：2006-12-13

申请号：EP99300686.5

申请日：1999-01-29

Applicant: STMicroelectronics Limited

Inventor： Rovati, Fabrizio

IPC: G06F13/16

CPC classification number: G06F13/1678

公开(公告)号：EP0940756A1

公开(公告)日：1999-09-08

申请号：EP99300686.5

申请日：1999-01-29

Applicant: STMicroelectronics Limited

Inventor： Rovati, Fabrizio

IPC: G06F13/16

CPC classification number: G06F13/1678

Abstract: There is disclosed a method and circuit for allowing access to a shared memory by at least two controllers having different bus widths. Such method and circuit provides particular advantages in its application to controlling access to a shared memory in a digital set-top-box of a digital television receiver.
An arbiter is provided to access between memory accesses by first and second memory access circuitry. The first memory access circuitry accesses a block of data in the shared memory, and the second memory access circuitry accesses two blocks of data in each memory access. Each second memory write access comprises reading blocks of data from first and second memory locations and then writing blocks of data to first and second memory locations.

Abstract translation: 公开了一种用于允许具有不同总线宽度的至少两个控制器访问共享存储器的方法和电路。 这种方法和电路在其用于控制​​对数字电视接收机的数字机顶盒中的共享存储器的访问方面提供了特别的优点。 提供仲裁器以通过第一和第二存储器访问电路访问存储器访问。 第一存储器访问电路访问共享存储器中的数据块，并且第二存储器访问电路在每个存储器访问中访问两个数据块。 每个第二存储器写访问包括从第一和第二存储器位置读取数据块，然后将数据块写入第一和第二存储器位置。

公开(公告)号：EP1026595A1

公开(公告)日：2000-08-09

申请号：EP99310307.6

申请日：1999-12-21

Applicant: STMicroelectronics Limited

Inventor： Rovati, Fabrizio

IPC: G06F13/16

CPC classification number: G06F13/1631

Abstract: A memory interface is disclosed for accessing a plurality in memory regions. The interface includes a register which stores a number of memory request signals received from a processor or the like. The memory interface includes circuitry for detecting which memory region each memory request refers to and also which page within that memory region is required to be accessed. Using the information contained in the register, the memory interface is able to determine which page within a memory region will be required to be accessed after the currently open page is closed. The memory interface can detect this information a number of memory requests in advance. Thus the memory interface is able to provide the necessary control instructions to initiate the opening of the subsequently required page within a memory region so that when the memory request requiring access to this page is serviced, there is no delay in opening the page.
The memory interface is arranged so that a page within a first memory region can be opened while a page within a second memory is being actually accessed.

Abstract translation: 公开了用于访问多个存储区域的存储器接口。 接口包括存储从处理器等接收的多个存储器请求信号的寄存器。 存储器接口包括用于检测每个存储器请求引用哪个存储器区域以及该存储器区域中哪个页面被访问的电路。 使用寄存器中包含的信息，存储器接口能够确定在当前打开的页面被关闭之后在存储器区域内需要访问哪个页面。 存储器接口可以提前检测这些信息的多个存储器请求。 因此，存储器接口能够提供必要的控制指令以启动在存储器区域内随后所需的页面的打开，使得当需要访问该页面的存储器请求被服务时，打开页面没有延迟。 存储器接口被布置成使得可以在实际访问第二存储器内的页面的同时打开第一存储器区域内的页面。

公开(公告)号：EP1026595B1

公开(公告)日：2008-07-23

申请号：EP99310307.6

申请日：1999-12-21

Applicant: STMicroelectronics Limited

Inventor： Rovati, Fabrizio

IPC: G06F13/16

CPC classification number: G06F13/1631