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公开(公告)号：EP0755015B1
公开(公告)日：2003-03-19
申请号：EP96303516.7
申请日：1996-05-17
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/57 , G06F9/30014 , G06F9/30029 , G06F9/30036 , G06F15/8076 , G06F2207/382
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公开(公告)号：EP0752643B1
公开(公告)日：2003-01-02
申请号：EP96303517.5
申请日：1996-05-17
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/76 , G06F9/30018 , G09G5/024
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公开(公告)号：EP1197845A3
公开(公告)日：2002-07-03
申请号：EP01204659.5
申请日：1996-05-15
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/76 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/30112 , G06F9/30145 , G06F9/30167 , G06F9/383
Abstract: A computer and a method of operating a computer is disclosed which allow manipulation of data values in the context of the execution of so-called "packed instructions". Packed instructions are carried out on packed operands. A packed operand comprises a data string consisting of a plurality of sub-strings, each defining a particular data value or object. The invention relates to a restructuring instruction which allows objects to be reorganised within a data string thereby minimising loading and storing operations to memory.
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公开(公告)号：EP1003095B1
公开(公告)日：2005-04-13
申请号：EP00102080.9
申请日：1995-06-16
Applicant: STMicroelectronics Limited
Inventor： Sturges, Andrew Craig , Sidwell, Nathan Mackenzie
IPC: G06F9/38
CPC classification number: G06F9/3804 , G06F9/3842
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公开(公告)号：EP0743593B1
公开(公告)日：2003-01-29
申请号：EP96303463.2
申请日：1996-05-15
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/76 , G06F9/30018 , G06F9/30025 , G06F9/30036 , G06F17/16
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Patent Agency Ranking
公开(公告)号：EP1197845A2
公开(公告)日：2002-04-17
申请号：EP01204659.5
申请日：1996-05-15
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/76 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/30112 , G06F9/30145 , G06F9/30167 , G06F9/383
Abstract: A computer and a method of operating a computer is disclosed which allow manipulation of data values in the context of the execution of so-called "packed instructions". Packed instructions are carried out on packed operands. A packed operand comprises a data string consisting of a plurality of sub-strings, each defining a particular data value or object. The invention relates to a restructuring instruction which allows objects to be reorganised within a data string thereby minimising loading and storing operations to memory.
Abstract translation: 公开了一种计算机和操作计算机的方法，其允许在执行所谓的“打包指令”的上下文中操纵数据值。 打包指令在打包操作数上执行。 打包操作数包括由多个子串组成的数据串，每个子串定义特定的数据值或对象。 本发明涉及一种重组指令，其允许在数据串中重新组织对象，从而最小化对存储器的加载和存储操作。
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公开(公告)号：EP0744686B1
公开(公告)日：2002-01-30
申请号：EP96303467.3
申请日：1996-05-15
Applicant: STMicroelectronics Limited
Inventor： Sidwell, Nathan Mackenzie
CPC classification number: G06F7/76 , G06F9/30018 , G06F9/30032 , G06F9/30036
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公开(公告)号：EP0689131B1
公开(公告)日：2001-08-29
申请号：EP95304199.3
申请日：1995-06-16
Applicant: STMicroelectronics Limited
Inventor： Sturges, Andrew Craig , Sidwell, Nathan Mackenzie
IPC: G06F9/38
CPC classification number: G06F9/3804 , G06F9/3842
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公开(公告)号：EP1003095A3
公开(公告)日：2001-02-28
申请号：EP00102080.9
申请日：1995-06-16
Applicant: STMicroelectronics Limited
Inventor： Sturges, Andrew Craig , Sidwell, Nathan Mackenzie
IPC: G06F9/38
CPC classification number: G06F9/3804 , G06F9/3842
Abstract: A computer system for executing branch instructions and a method of executing branch instructions are described. An instruction fetcher fetches a sequence of instructions from memory for execution and a sequence of instructions for commencing from a target location identified by a set branch instruction in a sequence of instructions being executed. When an effect branch signal is generated, the target instructions are next executed, and the fetcher which was fetching the instructions for execution commences fetching of the target instructions. At least some of said instruction strings further include a condition instruction which defines a condition and determines that further instructions to be executed are new instructions only if that condition is satisfied. The system includes also a select circuitry to execute the new instructions if said condition is satisfied.
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10.发明授权Processing of computer instructions with a reduced number of bits for operand specifiers 失效具有Operandenspezifierern的比特数目减少的计算机指令的执行
公开(公告)号：EP0689129B1
公开(公告)日：2005-11-16
申请号：EP95303609.2
申请日：1995-05-26
Applicant: STMicroelectronics Limited
Inventor： May, Michael David , Sidwell, Nathan Mackenzie , Sturges, Andrew Craig
IPC: G06F9/30
CPC classification number: G06F9/30178 , G06F9/30098 , G06F9/30156 , G06F9/30163 , G06F9/30167
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