Method and apparatus to digitally control the turn-off time of synchronous rectifiers for switched mode power supplies with isolated topologies
    2.
    发明公开
    Method and apparatus to digitally control the turn-off time of synchronous rectifiers for switched mode power supplies with isolated topologies 有权
    用于与隔离拓扑开关电源的同步整流器的关断时间的数字控制的方法和装置

    公开(公告)号:EP1148624A1

    公开(公告)日:2001-10-24

    申请号:EP00830274.7

    申请日:2000-04-10

    CPC classification number: H02M3/33592 Y02B70/1475

    Abstract: A circuit and method capable to digitally control and, in particular, to properly turn off one or two Mosfets used as rectifiers in switched mode power supply (SMPS) isolated topologies is disclosed. Basic circuit implementation of the presented technique is also introduced. The controller (10) has a fixed frequency square wave signal main clock input (CK), generically swinging from a low to a high value in two different time intervals. The controller (10) has one or two square wave outputs, (Out 1 , Out 2 ), swinging from low to high in phase or in opposite with respect to the clock signal (CK). The digital control method is able to generate an output signals timing to anticipate output transitions (Out 1 , Out 2 ) from high to low level with respect to the clock signal (CK) transitions. In the control scheme, one or two other secondary inputs (x 1 , x 2 ) set the amount of time anticipation of the respective transitions of the outputs (Out 1 , Out 2 ). In isolated SMPS topologies with the PWM controller located on the primary side, the clock signal is derived from the secondary output of the isolation transformer, while the outputs are meant to drive one or two mosfet gates. The method is able to provide the proper gate drive signals, solving all the known problems in controlling synchronous rectification.

    Abstract translation: 隔离的电路和方法能够以数字方式控制和,特别是,正确关闭用作开关模式电源整流器的一个或两个MOSFET(SMPS)拓扑结构是游离缺失盘。 因此,所提出的技术的基本电路实现引入。 该控制器(10)具有一个固定频率的方波信号的主时钟输入(CK),从低一般摆动到在两个不同的时间间隔的高值。 所述控制器(10)具有一个或两个方波输出(OUT1,OUT2)中,从低到高的相位或相反摆动相对于所述时钟信号(CK)。 数字控制方法能够在定时到产生输出信号来预测从高向低电平输出转换(OUT1,OUT2)相对于所述时钟信号(CK)的过渡。 在该控制方案中,一个或两个其它的二次输入(X1,X2)设置输出(OUT1,OUT2)的respectivement跃迁的时间预期的量。 在与位于初级侧的PWM控制器分离的SMPS拓扑,该时钟信号是从所述隔离变压器的二次输出导出,而输出是指,以驱动一个或两个MOSFET的栅极。 该方法能够提供适当的栅极驱动信号,解决所有在控制同步整流的已知问题。

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