公开(公告)号：EP1722466A1

公开(公告)日：2006-11-15

申请号：EP05425318.2

申请日：2005-05-13

Applicant: STMicroelectronics S.r.l.

Inventor： Librizzi, Fabrizio ,  Lentini, Franco

IPC: H02M3/335

CPC classification number: H02M3/33592 ,  Y02B70/1475

Abstract: A method and a relative control circuit for generating a control voltage (Vg) of a synchronous rectifying transistor (M1) with the desired anticipation time in a new and effective way are proposed. The anticipation time is continuously controlled with a closed-loop technique by comparing it with the duration of a reference pulse (Tw). The resulting error signal (Verr) is processed and provides the necessary correction to the MOSFET gate signal (Vg) in order to equalize the actual anticipation time to the duration of the reference pulse.

Abstract translation: 的方法和用于产生同步整流晶体管（M1）与在一个新的和有效的方式的预期期望的时间的控制电压（Vg）的相对控制电路提议。 的预期时间被连续地通过将其与一个参考脉冲（TW）的持续时间比较闭环技术控制。 所得到的误差信号（VERR）被处理并提供必要的校正，以MOSFET的栅极信号（VG），以均衡实际预期时间参考脉冲的持续时间。

公开(公告)号：EP1148624B1

公开(公告)日：2007-06-06

申请号：EP00830274.7

申请日：2000-04-10

Applicant: STMicroelectronics S.r.l.

Inventor： Lentini, Franco ,  Librizzi, Fabrizio ,  Scalia, Pietro ,  Cala, Ignazio

IPC: H02M3/335

CPC classification number: H02M3/33592 ,  Y02B70/1475

公开(公告)号：EP1148624A1

公开(公告)日：2001-10-24

申请号：EP00830274.7

申请日：2000-04-10

Applicant: STMicroelectronics S.r.l.

Inventor： Lentini, Franco ,  Librizzi, Fabrizio ,  Scalia, Pietro ,  Cala, Ignazio

IPC: H02M3/335

CPC classification number: H02M3/33592 ,  Y02B70/1475

Abstract: A circuit and method capable to digitally control and, in particular, to properly turn off one or two Mosfets used as rectifiers in switched mode power supply (SMPS) isolated topologies is disclosed. Basic circuit implementation of the presented technique is also introduced. The controller (10) has a fixed frequency square wave signal main clock input (CK), generically swinging from a low to a high value in two different time intervals. The controller (10) has one or two square wave outputs, (Out 1 , Out 2 ), swinging from low to high in phase or in opposite with respect to the clock signal (CK). The digital control method is able to generate an output signals timing to anticipate output transitions (Out 1 , Out 2 ) from high to low level with respect to the clock signal (CK) transitions. In the control scheme, one or two other secondary inputs (x 1 , x 2 ) set the amount of time anticipation of the respective transitions of the outputs (Out 1 , Out 2 ). In isolated SMPS topologies with the PWM controller located on the primary side, the clock signal is derived from the secondary output of the isolation transformer, while the outputs are meant to drive one or two mosfet gates. The method is able to provide the proper gate drive signals, solving all the known problems in controlling synchronous rectification.

Abstract translation: 隔离的电路和方法能够以数字方式控制和，特别是，正确关闭用作开关模式电源整流器的一个或两个MOSFET（SMPS）拓扑结构是游离缺失盘。 因此，所提出的技术的基本电路实现引入。 该控制器（10）具有一个固定频率的方波信号的主时钟输入（CK），从低一般摆动到在两个不同的时间间隔的高值。 所述控制器（10）具有一个或两个方波输出（OUT1，OUT2）中，从低到高的相位或相反摆动相对于所述时钟信号（CK）。 数字控制方法能够在定时到产生输出信号来预测从高向低电平输出转换（OUT1，OUT2）相对于所述时钟信号（CK）的过渡。 在该控制方案中，一个或两个其它的二次输入（X1，X2）设置输出（OUT1，OUT2）的respectivement跃迁的时间预期的量。 在与位于初级侧的PWM控制器分离的SMPS拓扑，该时钟信号是从所述隔离变压器的二次输出导出，而输出是指，以驱动一个或两个MOSFET的栅极。 该方法能够提供适当的栅极驱动信号，解决所有在控制同步整流的已知问题。

公开(公告)号：EP1225680B1

公开(公告)日：2009-11-11

申请号：EP01830032.7

申请日：2001-01-22

Applicant: STMicroelectronics S.r.l.

Inventor： Lentini, Franco ,  Librizzi, Fabrizio

IPC: H02M3/335

CPC classification number: H02M3/33561 ,  Y10T307/469

公开(公告)号：EP1225680A1

公开(公告)日：2002-07-24

申请号：EP01830032.7

申请日：2001-01-22

Applicant: STMicroelectronics S.r.l.

Inventor： Lentini, Franco ,  Librizzi, Fabrizio

IPC: H02M3/335

CPC classification number: H02M3/33561 ,  Y10T307/469

Abstract: A switched mode power supply comprising a first circuit (100) provided with a primary winding (101) of a transformer to which a pulse voltage is applied, at least one second circuit (24, 900, 1, 90) comprising at least one secondary winding (25, 71, 72, 3, 11, 12) of said transformer, at least one reactor (26, 73, 74, 10, 13, 14) provided with a magnetic core and which has a terminal connected to a terminal of said at least one secondary winding (25, 71, 72, 3, 11, 12), at least one filter (LC) provided with input and output terminals and a first diode (D2, D20) connected in parallel to the input terminals of the filter (LC) is shown. The other terminal of the at least one reactor (10, 13, 14) is connected to a terminal of said first diode (D20). The power supply comprises a second diode (D50) which has a terminal connected to the other terminal of the first diode (D20) and the other terminal connected to the other terminal of the at least one secondary winding (3, 11, 12) and a control circuit (4, 41) coupled to a output terminal of the filter (LC) and to the other terminal of said at least one secondary winding (3, 11, 12). The control circuit (4, 41) generates a current (Irl) able to reset said magnetic core of said at least one reactor (10, 13, 14).

Abstract translation: 1。一种开关模式电源，包括：第一电路（100），设置有施加有脉冲电压的变压器的初级绕组（101）;至少一个第二电路（24,900,190），包括至少一个第二 至少一个电抗器（26,73,74,10,13,14），所述电抗器（26,73,74,10,13,14）设置有磁芯并且具有连接到所述变压器的端子的端子 所述至少一个次级绕组（25,71,72,3,11,12），至少一个设置有输入和输出端子的滤波器（LC）以及并联连接到所述输入端子的输入端子的第一二极管（D2，D20） 显示了过滤器（LC）。 至少一个电抗器（10,13,14）的另一个端子连接到所述第一二极管（D20）的端子。 电源包括第二二极管（D50），其具有连接到第一二极管（D20）的另一个端子的端子和连接到至少一个次级绕组（3,11,12）的另一个端子的另一端子和 耦合到所述滤波器（LC）的输出端子和所述至少一个次级绕组（3,11,12）的另一个端子的控制电路（4,41）。 控制电路（4,41）产生能够重置所述至少一个反应器（10,13,14）的所述磁芯的电流（Ir1）。