Digital noise protection circuit and method
    1.
    发明公开
    Digital noise protection circuit and method 审中-公开
    DigitalerRauschunterdrückungsschaltkreisund Verfahren

    公开(公告)号:EP2246981A1

    公开(公告)日:2010-11-03

    申请号:EP10161176.2

    申请日:2010-04-27

    CPC classification number: H03K19/173 H03K5/1252

    Abstract: A method of protection from noise of a digital signal (Vcomp) generated by a comparator (1), comprising the steps of: generating an output signal (Vout) which switches from a first logic state to a second logic state at a first switching of logic state of the digital signal (Vcomp); detecting a change from the first logic state to the second logic state of the output signal (Vout); and inhibiting further switchings of the output signal (Vout) for a first time interval after change from the first logic state to the second logic state.

    Abstract translation: 一种防止由比较器(1)产生的数字信号(Vcomp)的噪声的方法,包括以下步骤:产生在第一次切换时从第一逻辑状态切换到第二逻辑状态的输出信号(Vout) 数字信号(Vcomp)的逻辑状态; 检测从所述第一逻辑状态到所述输出信号(Vout)的第二逻辑状态的变化; 以及在从第一逻辑状态改变到第二逻辑状态之后,在第一时间间隔内禁止进一步切换输出信号(Vout)。

Patent Agency Ranking