Method of calibrating the frequency of an oscillator in a phase locked loop circuit
    1.
    发明公开
    Method of calibrating the frequency of an oscillator in a phase locked loop circuit 有权
    Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife

    公开(公告)号:EP1638207A1

    公开(公告)日:2006-03-22

    申请号:EP04425685.7

    申请日:2004-09-15

    CPC classification number: H03L7/099 H03L7/10 H03L7/187

    Abstract: A method for calibrating the frequency of an oscillator in a phase-locked loop (PLL) is disclosed. For calibration, the loop is opened upstream the VCO and a fixed control voltage is applied, while the frequency of the VCO is altered in response to a digital control word supplied for band selection. The VCO is (1.) steered to a highest frequency, (2.) to a lowest frequency and (3.) repeatedly to an intermediate frequency dependent upon the previously measured frequencies and the desired target frequency. The resolution of the frequency measurement is increased from step to step.

    Abstract translation: 公开了一种用于校准锁相环(PLL)中的振荡器的频率的方法。 为了进行校准,在VCO的上游开环,并且施加固定的控制电压,同时响应于为频带选择提供的数字控制字而改变VCO的频率。 VCO根据先前测量的频率和期望的目标频率(1.)重复转向最高频率(2.)至最低频率和(3.)至中频。 频率测量的分辨率从一步到一步增加。

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