A non-volatile memory device with improved sequential programming speed
    1.
    发明公开
    A non-volatile memory device with improved sequential programming speed 有权
    具有改进的顺序编程速度非易失性存储器设备

    公开(公告)号:EP1434234A3

    公开(公告)日:2009-03-25

    申请号:EP03104713.7

    申请日:2003-12-16

    CPC classification number: G11C16/10 G11C2216/14

    Abstract: A non-volatile memory device (103) suitable to be programmed in a sequential mode is proposed. The device includes a plurality of blocks of memory cells (121) each one for storing a word, each block being identified by an address, means (124) for loading an input address at the beginning of a programming procedure and means (136,142) for setting an internal address to the input address; the device further includes means (127) for loading a predetermined number of input words in succession, means (130-133) for latching a page consisting of the predetermined number of input words, means (145-157) for executing a programming operation including writing the page in the blocks identified by consecutive addresses starting from the internal address, and means (139,142) for incrementing the internal address of the predetermined number in response to the completion of the programming operation.

    A non-volatile memory device with improved sequential programming speed
    2.
    发明公开
    A non-volatile memory device with improved sequential programming speed 有权
    NichtflüchtigeSpeicheranordnung mit verbesserter sequentieller Programmierungsgeschwindigkeit

    公开(公告)号:EP1434234A2

    公开(公告)日:2004-06-30

    申请号:EP03104713.7

    申请日:2003-12-16

    CPC classification number: G11C16/10 G11C2216/14

    Abstract: A non-volatile memory device (103) suitable to be programmed in a sequential mode is proposed. The device includes a plurality of blocks of memory cells (121) each one for storing a word, each block being identified by an address, means (124) for loading an input address at the beginning of a programming procedure and means (136,142) for setting an internal address to the input address; the device further includes means (127) for loading a predetermined number of input words in succession, means (130-133) for latching a page consisting of the predetermined number of input words, means (145-157) for executing a programming operation including writing the page in the blocks identified by consecutive addresses starting from the internal address, and means (139,142) for incrementing the internal address of the predetermined number in response to the completion of the programming operation.

    Abstract translation: 提出了一种适用于以顺序模式编程的非易失性存储器件(103)。 该装置包括多个存储单元块(121),每个存储单元块(121)用于存储单词,每个块由地址标识,用于在编程程序开始时加载输入地址的装置(124)和装置(136,142),用于 设置输入地址的内部地址; 该设备还包括用于连续加载预定数量的输入字的装置(127),用于锁存由预定数量的输入字组成的页面的装置(130-133),用于执行编程操作的装置(145-157),包括: 在由内部地址开始的由连续地址标识的块中写入页面,以及响应于编程操作的完成来增加预定数量的内部地址的装置(139,142)。

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