公开(公告)号：EP4220692A1

公开(公告)日：2023-08-02

申请号：EP23153878.6

申请日：2023-01-30

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro ,  MARCHISI, Fabio

IPC: H01L21/60 ,  H01L23/492

Abstract: A semiconductor device comprises one or more electrically conductive clips (18) arranged in a bridge-like position between a semiconductor chip (142) and an electrically conductive pad (12B). The clip (18) is soldered to the semiconductor chip (142) and to the electrically conductive pad (12B) via soldering material (22) applied at coupling surfaces facing towards the semiconductor chip (142) and the electrically conductive pad (12B). Prior to positioning the clip (18) in a bridge-like position between the semiconductor chip (142) and the electrically conductive pad (12B), one or more pairs of complementary positioning formations (100, 102) are formed comprising a cavity (102) formed in the electrically conductive clip (18) and a protrusion (100) comprised of a stack of stud bumps is formed in the electrically conductive pad (12B). With the electrically conductive clip (18) in a desired bridge-like position, the complementary positioning formations (100, 102) are mutually engaged and retain the conductive clip (18) in such a desired bridge-like position avoiding displacement during soldering.

公开(公告)号：EP4113601A1

公开(公告)日：2023-01-04

申请号：EP22181350.4

申请日：2022-06-27

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro

IPC: H01L23/498 ,  H01L23/495

Abstract: Pre-molded leadframes (12) for semiconductor devices are manufactured molding electrically insulating material (14) onto a laminar sculptured structure of electrically conductive material comprising die pads (12A, 12B) configured to have semiconductor device components mounted. A pair of die pads (12A, 12B) are coupled via a sacrificial connection formation (120A, 120B, 120C) comprising a first extension (120A) and a second extension (120B) of the die pads (12A, 12B) at neighboring locations of the front or top surface of the leadframe (12). A bridge formation (120C) coupling the first (120A) and second (120B) extensions is provided at the back or bottom surface of the leadframe to provide a sacrificial connection formation between the die pads (12A, 12B). The bridge formation (120C) is removed after molding the electrically insulating material (14) to decouple the die pads (12A, 12B). A cavity (120C') is formed at the second surface of the leadframe (12) without affecting the shape of the die pads (12A, 12B).

公开(公告)号：EP4376072A1

公开(公告)日：2024-05-29

申请号：EP23203555.0

申请日：2023-10-13

Applicant: STMicroelectronics S.r.l.

Inventor： DE SANTA, Matteo ,  MAZZOLA, Mauro

IPC: H01L23/495 ,  H01L23/31

CPC classification number: H01L23/49548 ,  H01L23/4952 ,  H01L23/3107

Abstract: One or more semiconductor dice (14) are arranged on a die pad (12A) at a first surface of a support substrate such as a leadframe (12), the support substrate (12) having a first thickness (T1) between the first surface and a second surface opposite the first surface and comprising an array of electrically conductive leads (12B) around the die pad (12A). Terminal recesses (200) are provided in electrically conductive leads (12B) in the array at the first surface of the support substrate (12). The electrically conductive leads (12B) in the array of electrically conductive leads (12B) have at the terminal recesses (200) a second thickness (T2) less than the first thickness (T1).
The semiconductor die (14) is coupled with the electrically conductive leads (12B) via electrically conductive elongated formations such as wires or ribbons (16) having coupling ends (161, 162) to the electrically conductive leads (12B) arranged in the terminal recesses (200). The support substrate (12) is partially cut starting from the second surface at the terminal recesses (200) with a cutting thickness between the first thickness (T1) and the second thickness (T2). The partial cut produces exposed surfaces of the support substrate (1200A) and the coupling ends (1200B) of the electrically conductive elongated formations (16) providing wettable flanks for solder material (SM).

公开(公告)号：EP4113599A1

公开(公告)日：2023-01-04

申请号：EP22181152.4

申请日：2022-06-27

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro

IPC: H01L23/495

Abstract: Semiconductor chips to be finally singulated to individual semiconductor devices are arranged onto respective adjacent areas of a mounting substrate (10) such as a pre-molded leadframe. The mounting substrate comprises a laminar, electrically conductive sculptured (e.g. etched) structure and electrically insulating material (12) molded onto the sculptured structure. Electrically conductive side formations (10A, 10B) in the adjacent areas of the mounting substrate, comprise first (10A) and second (10b) pads at the front surface and the back surface, respectively, of the substrate (10) .
The first contact pads (10A) at the front surface of the substrate (10A) comprise narrowed portions (100A) having side recesses and the electrically insulating material (12) extends into these side recesses to provide anchoring formations of the insulating material (12) to the electrically conductive sculptured structure of the mounting substrate. The second contact pads (10B) at the back surface of the substrate (10) advantageously comprise enlarged portions (100B) having side extensions adjacent the side recesses (16) in the narrowed portions (100A) of the contact pads (10A) at the front surface of the substrate.

公开(公告)号：EP4016617A1

公开(公告)日：2022-06-22

申请号：EP21215210.2

申请日：2021-12-16

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro ,  TIZIANI, Roberto

IPC: H01L23/498 ,  H01L23/495

Abstract: In a method of manufacturing semiconductor devices, one or more semiconductor chips are arranged at a semiconductor chip mounting area (14) in a first surface of a leadframe (10).
The leadframe comprises a pattern of electrically-conductive formations (12, 14, 14', 14") with one or more sacrificial connection formations (100) extending bridge-like between a pair of electrically-conductive formations (14, 14'). The sacrificial connection formation or formations (100) are formed at one of the first surface and the second surface of the leadframe (10) and have a thickness less than the leadframe thickness between the first surface and the second surface. A filling of electrically-insulating material (16) is molded between the electrically-conductive formations of the leadframe, with electrically-insulating material molded between the connection formation(s) and the other surface of the leadframe (10). The sacrificial connection formation(s) counter deformation and displacement of parts during formation and pre-molding of the leadframe (10).

公开(公告)号：EP4125125A1

公开(公告)日：2023-02-01

申请号：EP22187456.3

申请日：2022-07-28

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro ,  TIZIANI, Roberto

IPC: H01L23/498 ,  H01L23/495

Abstract: A pre-molded leadframe is produced starting from a sculptured, electrically conductive laminar structure (10) having empty spaces therein and having a first thickness (D1) with one or more die pads (10) having a first die pad surface (10A) for mounting semiconductor chips as well as a second die pad surface (10B) opposite the first die pad surface (10A). Insulating pre-mold material (12) is molded onto the laminar structure (10) clamped between a pair of planar clamping surfaces (TPS, BPS) kept at a distance equal to the thickness (D1). The pre-mold material (12) penetrates into the empty spaces and provides a laminar pre-molded substrate (10, 12) having the first thickness (D1) with the first die pad surface (10A) left exposed by the pre-mold material (12). The die pad (10) has a second thickness (D2) between the first die pad surface (10A) and the second die pad surface (10B) that is less than the first thickness D1 so that, when clamped between the clamping surfaces (TPS, BPS) the first die pad surface (10A) abuts against the first clamping surface (TPS) and the second die pad surface (10B) is at a distance from the second clamping surface (BPS). One or more pillar formations (100) are provided protruding from the second die pad surface (10B) of a height equal to the difference between the first thickness (D1) and the second thickness (D2). With the laminar structure (10, 14) clamped between the clamping surfaces (TPS, BPS) the pillar formation(s) abut against the second planar clamping surface (BPS). The die pad (10) is thus effectively clamped between the clamping surfaces (TPS, BPS) countering undesired flashing of the pre-mold material (12) over the first die pad surface (10A) .

公开(公告)号：EP4125121A1

公开(公告)日：2023-02-01

申请号：EP22187296.3

申请日：2022-07-27

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro

IPC: H01L23/495 ,  H01L23/498

Abstract: A method of manufacturing a pre-molded substrate for semiconductor devices comprises providing a sculptured, electrically conductive (e.g., copper) laminar structure (10) having spaces therein. The laminar structure includes one or more die pads (10) having a first die pad surface configured to have semiconductor chips (C1) mounted thereon. A pre-mold material (12) molded onto the laminar structure (10) penetrates into the spaces therein and provides a laminar pre-molded substrate (10, 12) including the first die pad surface left exposed by the pre-mold material (12).
An alternation of first (200A) and second (200B) anchoring formations to the pre-mold material (12) is provided along the peripheral edge of the die pad (10). The first anchoring formations (200A) are configured to counter first detachment forces inducing displacement of the die pad (10) with respect to the pre-mold material (12) in a first direction from the second die pad surface (10B) to the first die pad surface (10A). The second anchoring formations (200B) configured to counter second detachment forces (F2) inducing displacement of the die pad (10) with respect to the pre-mold material (12) in a second direction from the first die pad surface (10A) to the second die pad surface (10B).

公开(公告)号：EP4220693A1

公开(公告)日：2023-08-02

申请号：EP23153889.3

申请日：2023-01-30

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro ,  MARCHISI, Fabio

IPC: H01L21/60 ,  H01L23/492

Abstract: A semiconductor device comprises one or more electrically conductive clips (18) arranged in a bridge-like position between a semiconductor chip (142) and an electrically conductive pad (12B).
The clip (18) is soldered to the semiconductor chip (142) and to the electrically conductive pad (12B) via soldering material (22) applied at coupling surfaces facing towards the semiconductor chip (142) and the electrically conductive pad (12B).
Prior to soldering, the clip or clips (18) are immobilized in the desired bridge-like position via welding, such as laser welding or gluing (G) at dedicated immobilization areas (180).

公开(公告)号：EP4163960A1

公开(公告)日：2023-04-12

申请号：EP22199627.5

申请日：2022-10-04

Applicant: STMicroelectronics S.r.l.

Inventor： DE SANTA, Matteo ,  MAZZOLA, Mauro

IPC: H01L23/00 ,  H01L23/31

Abstract: A semiconductor device (10) such as, for instance, a power QFN package for use in the automotive sector comprises:
a substrate (12) having arranged thereon one or more semiconductor dice (C2) and one or more electrically conductive ribbons (14) providing a current flow path therefor, and
an insulating encapsulation (16) molded onto the substrate (12) having the semiconductor die or dice (C2) and the electrically conductive ribbon or ribbons (14) arranged thereon.
The insulating encapsulation (16) encapsulates the semiconductor die or dice (C2) and the electrically conductive ribbon or ribbons (14). The electrically conductive ribbon or ribbons (14) comprise a roughened surface (14A) providing a roughened coupling interface to the insulating encapsulation (16).

公开(公告)号：EP4125124A1

公开(公告)日：2023-02-01

申请号：EP22187310.2

申请日：2022-07-27

Applicant: STMicroelectronics S.r.l.

Inventor： MAZZOLA, Mauro

IPC: H01L23/498 ,  H01L23/495

Abstract: A method of manufacturing a pre-molded substrate for semiconductor devices comprises providing a sculptured electrically conductive (e.g., copper) laminar structure (10) having spaces therein. The laminar structure includes one or more die pads (10) having a first die pad surface configured to have semiconductor chips (Cl) mounted thereon. A pre-mold material (12) molded onto the laminar structure (10) penetrates into the spaces therein and provides a laminar pre-molded substrate (10, 12) including the first die pad surface left exposed by the pre-mold material (12) with the die pad(s) bordering on the pre-mold material (12). One or more stress-relief curved portions (100) are provided at the periphery of one or more of the die pads (10). The stress-relief curved portions (100) are configured to border on the pre-mold material (12) over a smooth surface to effectively counter the formation of cracks in the pre-mold material (12) as a result of the pre-molded substrate being bent.