公开(公告)号：EP4109286A1

公开(公告)日：2022-12-28

申请号：EP22178614.8

申请日：2022-06-13

Applicant: STMicroelectronics S.r.l.

Inventor： MONDELLO, Antonino ,  PISASALE, Salvatore

IPC: G06F15/173 ,  G06F13/14

Abstract: According to an aspect, it is proposed a system on chip comprising:
- at least one master device (Mj, My),
- at least one slave device (Sk),
- a connection interface (BM) configured to route signals between said at least one master device (Mj, My) and said at least one slave device (Sk), the connection interface being configured to operate according to configuration parameters,
- a configuration bus (CFB) connected to the connection interface (BM), the configuration bus (CFB) being configured to deliver new configuration parameters to the connection interface so as to adapt the operation of the connection interface.

公开(公告)号：EP4258550A1

公开(公告)日：2023-10-11

申请号：EP23161658.2

申请日：2023-03-14

Applicant: STMicroelectronics S.r.l.

Inventor： CONDORELLI, Riccardo ,  CARRANO, Michele Alessandro ,  MONDELLO, Antonino

IPC: H03K5/26 ,  H03L7/091

Abstract: A method, comprising: producing (12) a set of delayed replicas (REF_D) of a reference clock signal (REF), wherein delayed replicas in the set of delayed replicas (REF_D) have respective signal edges delayed in time by a mutual time delay therebetween; producing a set of edge detecting signals comprising edge detecting signals indicative of respective distances of edges of delayed replicas in the set of delayed replicas (REF_D) from an edge of a clock signal (CK) having a clock period; selecting (16) based on edge detecting signals in the set of edge detecting signals a delayed replica (REF_Dj) in the set of delayed replicas (REF_D) having a distance from the clock signal edge (CK) that is shorter than the distance from the clock signal edge (CK) of any other delayed replica in the set of delayed replicas (REF_D); performing a comparison (18) of the clock period of the clock signal (CK) and of the selected delayed replica, obtaining as a result of the comparison, an error signal (CK_C) indicative of a difference therebetween, and providing the error signal (CK_C) to user circuitry (U) configured to calibrate the clock signal (CK) based on the error signal (CK_C).

公开(公告)号：EP4156000A1

公开(公告)日：2023-03-29

申请号：EP22195518.0

申请日：2022-09-14

Applicant: STMicroelectronics S.r.l.

Inventor： MONDELLO, Antonino ,  CARRANO, Michele Alessandro ,  CONDORELLI, Riccardo

IPC: G06F21/57 ,  G06F21/64

Abstract: The present disclosure relates to a method comprising:
- executing, by an electronic device (100), a first firmware stored in a volatile memory (113) of the electronic device, the execution of the first firmware causing an updated firmware key (130) to be stored in a non-volatile memory (124) of the electronic device;
- uploading a second encrypted firmware module to the electronic device;
- decrypting the second encrypted firmware module by a cryptographic processor (108) of the electronic device based on the updated firmware key; and
- installing the decrypted second firmware module in the volatile memory of the electronic device at least partially overwriting the first firmware.