公开(公告)号：EP1331644A3

公开(公告)日：2004-02-04

申请号：EP02019433.8

申请日：2002-08-30

Applicant: STMicroelectronics S.r.l.

Inventor： Micheloni, Rino ,  Motta, Maria

IPC: G11C16/30

CPC classification number: G11C16/30

Abstract: The invention relates to a method and a circuit for regulating the source terminal (S) voltage to the of a non-volatile memory cell (3) during the cell programming and/or reading phases. The method comprises a phase of locally regulating said voltage value and consists of comparing the source current (Is) of the cell array (3) with a reference current (Iref). A fraction of the source current (Is) is converted to a voltage and compared with a voltage generated from a memory cell acting as a reference and being programmed to the distribution with the highest current levels; the comparison result being used for controlling a current generator (25) to inject, into the source terminal (S), the current necessary to keep the predetermined voltage thereof at a constant value.

公开(公告)号：EP1331644A2

公开(公告)日：2003-07-30

申请号：EP02019433.8

申请日：2002-08-30

Applicant: STMicroelectronics S.r.l.

Inventor： Micheloni, Rino ,  Motta, Maria

IPC: G11C16/30

CPC classification number: G11C16/30

Abstract: The invention relates to a method and a circuit for regulating the source terminal (S) voltage to the of a non-volatile memory cell (3) during the cell programming and/or reading phases. The method comprises a phase of locally regulating said voltage value and consists of comparing the source current (Is) of the cell array (3) with a reference current (Iref). A fraction of the source current (Is) is converted to a voltage and compared with a voltage generated from a memory cell acting as a reference and being programmed to the distribution with the highest current levels; the comparison result being used for controlling a current generator (25) to inject, into the source terminal (S), the current necessary to keep the predetermined voltage thereof at a constant value.

Abstract translation: 本发明涉及一种方法和用于该单元编程期间调节所述源终端（S）到一个非易失性存储单元（3）的电压和/或读取阶段的电路。 该方法包括在本地调节所述电压值和所述单元阵列（3）的源极电流（IS）与基准电流（IREF）比较的besteht的相位。 源电流（IS）的一小部分被转换为一个电压，并与从作为参考，被编程为具有最高电流电平的分布的存储单元中产生的电压进行比较; 被用于控制的电流发生器（25）注入，到源终端（S）的比较结果，所需的电流为恒定值保持其预定的电压。