公开(公告)号：EP1801896A1

公开(公告)日：2007-06-27

申请号：EP05112912.0

申请日：2005-12-23

Applicant: STMicroelectronics S.r.l.

Inventor： Dennison, Charles ,  Peters, John

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/04 ,  H01L27/2427 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/1675

Abstract: In a phase change memory including an ovonic threshold switch, conduction around the chalcogenide layer (22) in the ovonic threshold switch is reduced. In one embodiment, the reduction is achieved by undercutting the conductive layers (18,26) on either side of the chalcogenide layer (22). In another embodiment, an angled ion implantation is carried out which damages the edge regions (18b,16b) of the conductive layers (18,26) that sandwich the chalcogenide layer (22).