公开(公告)号：EP1296378A1

公开(公告)日：2003-03-26

申请号：EP01830599.5

申请日：2001-09-21

Applicant: STMicroelectronics S.r.l.

Inventor： Schillaci, Antonino ,  Ponzio, Paola Maria

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/10 ,  H01L29/08 ,  H01L23/485 ,  H01L21/336

CPC classification number: H01L29/7802 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66712 ,  Y10S438/981

Abstract: A MOS technology semiconductor device formed on a substrate (1) of a first conductivity type is described. The device comprises zones (200) where elementary active units suitable for treating electric signals and at least one inactive zone (100, 101) suitable to the electric signal output or input are formed. The substrate (1) is connected with the drain terminal of said device and the elementary active units comprise body regions (23) of a second conductivity type which are connected with to the source terminal. The at least one inactive zone (100, 101) comprises a semiconductor region (4) of a second conductivity type which is formed in the substrate (1), which is adjacent with a surface of the substrate, which is connected with the source terminal of the device and placed under a conductive layer (7); the semiconductor region (4) is covered by a silicon oxide layer (2) which has a surface alternation of first (8) and second (5) zones which are contiguous to each other and wherein the first zones (8) have a higher thickness than the second zones (5) and the silicon oxide layer (2) is covered by a conductive layer (7).

Abstract translation: 描述形成在第一导电类型的衬底（1）上的MOS技术半导体器件。 该装置包括区域（200），其中形成适合于处理电信号的基本有源单元和形成适合于电信号输出或输入的至少一个非活动区域（100,101）。 衬底（1）与所述器件的漏极端子连接，并且基本有源单元包括与源极端子连接的第二导电类型的体区域（23）。 所述至少一个非活性区域（100,101）包括形成在所述基板（1）中的与所述基板的表面相邻的第二导电类型的半导体区域（4），所述半导体区域与所述源极端子 并放置在导电层（7）下方; 半导体区域（4）由氧化硅层（2）覆盖，氧化硅层（2）具有彼此邻接的第一（8）和第二（5）区域的表面交替，并且其中第一区域（8）具有较高的厚度 比第二区域（5）和氧化硅层（2）被导电层（7）覆盖。