公开(公告)号：EP4036987A1

公开(公告)日：2022-08-03

申请号：EP22153999.2

申请日：2022-01-28

Applicant: STMicroelectronics S.r.l.

Inventor： RENNA, Crocifisso Marco Antonio ,  LANDI, Antonio ,  CAFRA, Brunella

IPC: H01L29/417 ,  H01L29/739 ,  H01L29/45 ,  H01L21/283 ,  H01L29/78

Abstract: A vertical-conduction semiconductor device (20), in particular a vertical IGBT, is provided with a backside metal structure (30), i.e. the collector electrode in case the device is an IGBT. The device comprises a silicon substrate (22) having a front face (22a) and a rear face (22b); a front-side structure (24) arranged on the front face (22a) of the substrate (22), having at least one current-conduction region at the front face (22a); and a back side metal structure (30), arranged on the rear face (22b) of the substrate (22), in electrical contact with the substrate (22) and constituted by a stack of metal layers. The back side metal structure (30) is formed by: a first metal layer (26); a silicide region (27), interposed between the rear face (22b) of the substrate (22) and the first metal layer (26) and in electrical contact with the aforesaid rear face (22b); and a second metal layer (28) arranged on the first metal layer (26). In one embodiment the silicide layer (27) is a nickel silicide and first metal layer (26) is composed of nickel and vanadium with a vanadium concentration of 5-8%.