Abstract:
The value of the maximum current through an energy storage inductor of a DC-DC step-up converter is increased stepwise up to attain a maximum pre-established value. A relatively low current threshold is thus set in presence of a load that absorbs a relatively small current and a higher current threshold when the load absorbs a relatively large current. The output voltage of the converter and the inductor voltage are compared with respective thresholds, thus depending from the result of these distinct comparisons, the ripple of the output voltage of the converter is effectively limited by adjusting the comparison threshold of the inductor voltage. The number of occurrences of the output voltage of the converter reaching its respective threshold is down counted and the number of occurrences of the inductor voltage reaching its respective threshold is up-counted: when the resulting count attains a certain value, the comparison threshold of the inductor voltage is incremented and the counting is reset.
Abstract:
Integrated circuit (20, 80, 90) generating at least a voltage linear ramp having a slow rise of the type comprising an input terminal (21, 81, 91), connected to a first voltage reference (VREF) and an output terminal (24, 84, 94) adapted for providing a controlled ramp signal (V RAMP ), the circuit comprising at least one operational amplifier (OP3) having a non-inverting input terminal connected to said input terminal (21, 81, 91) and to an output terminal in feedback on an inverting input terminal and connected to the output terminal (24, 84, 94) of the ramp generator circuit (20, 80, 90) itself. The ramp voltage generator (20, 80, 90) according to the invention further comprises a first storage capacitance (Cs) connected between the non-inverting input terminal of the operational amplifier (OP3) and a ground voltage reference (GND) and loaded by means of a second pumping capacitance (Cp) inserted in parallel to said first capacitance (Cs) between the input terminal (21, 81, 91) of the ramp generator circuit (20, 80, 90) and the ground voltage reference (GND).
Abstract:
The invention relates to a level shifter electronic device with very low consumption of current, of the type supplied between a first voltage reference (VOUT) of power supply and a second voltage reference (GND) and comprising a circuital portion (2) with differential cell having an output terminal (OUT) and at least a first (4) and a second (5) input terminal, on the output terminal a signal translated in level with respect to the signal present on one (4) of said input terminals, being drawn. The device further comprises an additional circuital portion (3) connected to a node (A) of the differential cell and comprising at least a pull-down component (9) inserted between said node and the second voltage reference (GND). The pull-down component (9) is a MOS transistor (M6) having the conduction terminals connected between said node (A) and the second voltage reference (GND) and the gate terminal connected to the first voltage reference (VOUT) of power supply by means of a series of transistors.
Abstract:
A pump capacitor (Cpump) or alternatively an energy storing inductor (Coil) is charged by coupling it to a voltage source (VIN), thereafter the charged pump capacitor (Cpump) or energy storing inductor (Coil) is connected in parallel to one of said capacitors or capacitance cell to be charged. The sequence of different connections of the pump capacitor (Cpump) or inductor (Coil) to the charge voltage source (VIN) and to the selected one of the capacitors of the series is actuated through a plurality of coordinately controlled switches (A,B,C,D,E) that establish distinct current circulation paths, according to a switched-capacitor or switched inductor technique, all driven by respective periodic control signals, generated from a master clock signal. In charging all the capacitance cells substantially at the same time, at every charge/discharge cycle it may be decided which capacitance or cell is going to be charged by connecting in parallel thereto the charged pump capacitor (Cpump) or charged inductor (Coil), depending on the voltages detected on each capacitance cell of a super capacitor.